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The CIS Newsletter
The Center for Integrated Systems,
Stanford University
Stanford, California
Spring/Summer 1996
In This Issue
In Memoriam:A Tribute to David Packard
The David Packard Legacy and Industrial Partnerships
Six FMA Fellows and their Mentors
Quality In, Quality Out
"Let There Be TriMedia, and Lo..." A Philips Project
History and CIS
New NSF/SRC Engineering Research Center for
Environmentally Benign Semiconductor Manufacturing
CIS Tours HP Palo Alto Labs
Following David Packard's death in March there
was widespread recognition of the pioneering role he played in the
development of "Silicon Valley." A unique culture has evolved in which
the electronics industry (particularly Hewlett-Packard), the
universities (particularly Stanford) and local leaders have acted in a
collaborative way to generate an environment in which all sectors
contribute and benefit. We have done jointly what could not have
happened separately and never would have without David Packard.
Following the threads of the fabric back to their source, one finds
visions, perceptions and developments centrally involving David
Packard, his partner, William Hewlett and their mentor, Fred Terman.
David Packard,
Wm. Hewlett, Frederick Terman, 1952
Given the land resource which became Stanford Industrial Park,
Fred Terman's vision of a community of technical scholars was realized,
and our environment coupling graduate study and industry is unmatched
in the world. The correspondence in the early 50s between Terman and
industry leaders (particularly Packard and Hewlett) regarding the
Honors Cooperative Plan (HCP) is very illuminating. The requirements
that HCP students have the same admission standards as full-time
students, that they be able to complete the MS in about two calendar
years, that industry pay the full cost (double tuition) were demanding
conditions. Experience has verified the concept. The best graduates
from across the country have been recruitable, bringing new talent to
the new opportunities springing up here.
I should like to recount a personal experience with David
Packard preceding the CIS formation but relevant to its later
emergence. The idea occurred to me that a liaison program between our
solid-state electronics faculty with their doctoral students and
companies working in that then-new field would be interesting and
beneficial to both sides. We proposed an annual review of Stanford work
in solid-state electronics. It would provide a forum for discussion of
new ideas and results, be stimulating for our PhD candidates as
potential employees, and provide a modest but unrestricted income to
our research program. Dr. Terman was enthusiastic, suggested the "club"
be called "The Industrial Affiliates of Stanford in Solid-State
Electronics" and that a committee of three be formed to identify and
approach members. The committee consisted of Terman, Packard and
Linvill. With such colleagues I could not fail!

ERL Educational Wing Plaque
Over the past year we have been exuberant about the scheduled
new
building enabled by the $77.4 million pledges of David Packard and
William Hewlett. It represents a magnificent base for our work into the
next century. Moreover, it is a powerful sequel to earlier
contributions by Hewlett and Packard. Their first Stanford building was
the Educational Wing of the Electronics Research Laboratory provided in
1952 when the annual sales of Hewlett Packard were less than $10
million. The level of courage and generosity represented by that first
contribution of these remarkable friends of Stanford has been sustained
to this day. Moreover, it is a singular example of what comes both to
the institution and to such alumni in a lifelong connection in
enterprises of mutual and public interest.
The David Packard Legacy and Industrial Partnerships
At the opening of the Spring 1996 quarter, a new
set of
dynamics started within the CIS buildings and across Serra Street with
our colleagues in the Gates Building. As noted in the last newsletter,
many of our long-time collaborators from the Computer Systems
Laboratory (CSL) joined the entire
Computer Science
Department (CSD) in the move to Gates.
On January 30, Bill Gates spent the day at Stanford sharing
his vision for the future including the dedication of the building
itself. On that day, Stanford also honored many others who have
promoted and supported the vision of developing a Science Quad in the
near west side of campus. Bill Hewlett and David Packard, in the front
row, both congratulated Bill Gates on his generosity to their alma
mater. John Linvill, in our feature article, shares his personal
insights concerning the key role David Packard has played for Stanford
generally as well to the School of Engineering more specifically. David
Packard's death on March 26, 1996 represents a loss of one of our
university's greatest supporters and mentors. I would like to add a few
words on how that mentorship affected my own career here at Stanford.
David Packard, in addition to his legacy in business and
generous support of the community, also served his country as Deputy
Secretary of Defense (1969-71) during a very contentious period of
social unrest arising from tensions over the Vietnam War. His response
to the challenges and criticism related to the need for new funding
models to support a stronger industrial base for research was typically
direct; he backed up his words with good deeds. Beginning in about
1975, David Packard established a Corporate Engineering group at HP
with the specific task of promoting university-industry collaborations.
In the June, 1981 issue of the HP Journal he wrote: "I am very pleased
about the way these programs are going, and I hope that as time goes
along we will be able to initiate similar programs in new areas of
interest to our company. I also hope that the experience and success we
at HP have had in university-industry cooperative research will
encourage other companies throughout industry to develop, or expand,
similar programs in the future." Indeed, within a few years broad-scale
programs such as SRC were launched and HP was a charter member and key
promoter in the founding of CIS.
As an Assistant Professor in 1975, I was the fortunate
recipient of several grants from the HP program. In fact, in addition
to promoting the rapid development of Computer-Aided Design (CAD) tools
like the SUPREM program for process models, the equipment grants helped
us develop capabilities for transistor characterization (the TECAP
program, a feature article in the same 1981 HP Journal issue) which
later became broadly used in the industry. What I remember best about
that era however, was the way in which HP helped promote technical
reviews that directly connected our students to dozens of potential
mentors and ultimately users of our research results. These HP staff
would come to Stanford from nearly a dozen divisions and spend quality
time in these reviews. In fact, many of our best practices within CIS
such as the FMA
and SPIE
programs, as well as the SRC TAB Reviews, are much a reflection of the
visionary path which David Packard promoted two decades ago. That
combination of personal dedication and corporate commitment can serve
as an inspiration to us all. The long-term benefits of developing
people, in fact, the hallmark of the "HP way," is the true legacy that
David Packard has helped to foster.
Indeed, the development of people is the strategic role of the
university and the industrial contributions to this educational process
are many. The FMA program captures the essential spirit of the need
both financially to support students and to build a partnership between
a student Fellow, an industrial Mentor and the faculty Advisor. I am
pleased to report that several of our partner companies have
contributed supplemental FMA grants in order to further strengthen
their connections to our students' research programs. In the face of
ongoing governmental budget cuts and corporate downsizing in terms of
basic research, the benefits of creating a strategically linked network
of researchers is all the more critical. The interplay between
company-supported fellowships and the ARPA-funded
Computational Prototyping of 21st Century Device Structures project
offers a number of exciting models. The following example is
representative of the kind of interactions we hope will continue to
grow in the future.
In support of both the CIS research program and applications
of parallel computing for the Computational Prototyping program, IBM
donated a 16 node SP/1 machine to CIS in 1994. In 1995, they supported
two students fellowships that have directly contributed to
computational prototyping program. Ken Wang is the developer of a
"virtual integrated process" (VIP) simulator for creating 3D structures
and spent last summer working at IBM, East Fishkill on information
models to help integrate IBM's 3D tools and databases. Bruce Herndon
has developed a parallel version of Stanford's PISCES program that runs
not only on the IBM SP/2, achieving 550 MegaFLOPS performance on our 16
node machine, but also is portable to Intel, Sun and other PC and
workstation environments due to use of MPI standards. He has also
ported the PISCES-MP code to the 128 node SP/2 NASA machine at Ames
Research, supported under the NAS program, achieving 9.7 GigaFLOPS.
NASA sponsored a workshop on March 28-29, 1996 to promote broader
connection to the semiconductor industry of the invited speakers, a
meeting attended by representatives of more than half our CIS partners.
Both Bruce Herndon and Vijay Naik (IBM) discussed progress in
parallelization of IBM's FIELDAY code, a 3D device simulator. This
parallel 3D tool will provide essential leverage in exploring deep
submicron devices. In addition to it running on the Stanford SP/2
machine, NASA has expressed interest and willingness to have the 3D
tool available on their much larger 128 node SP/2 as well.
In summary, there exciting new developments at Stanford,
especially at the intersection of CIS and Gates buildings. The growing
involvement of our industrial partners in supporting students through
fellowship programs such as FMA as well as the direct partnerships in
support of broader research activities such as the Computational
Prototyping project mentioned above suggest a promising future for
academic-industrial-government interactions. We strongly encourage your
greater involvment in these synergistic developments.
Six FMA Fellows and their Mentors
Some personal comments by six FMA Fellows and their
Mentors, as Reported to the CIS Advisory Committee on May 3, 1996.
Kathryn Wilder
1) FELLOW:
Kathryn Wilder, Applied Physics
MENTOR: Bhanwar Singh, Advanced Micro
Devices
ADVISOR: Calvin Quate, Electrical
Engineering Department
PROJECT: High-Speed, Ultra-High-Resolution Lithography Using the Atomic
Force Microscope
"AMD is pleased to support Kathryn Wilder's graduate studies
under Professor Calvin Quate, a co-inventor of the atomic force
microscope, a powerful new tool for imaging nanometer scale objects and
surfaces. We believe that by working with Kathryn and Professor Quate,
AMD has a better window into the possibilities AFM offers
microlithography and the future of IC fabrication." Bill Arnold, AMD
2) FELLOW: David Bang, Electrical
Engineering Department
MENTOR: Zoran Krivokapic, AMD's
Submicron Development Center
ADVISOR:
Krishna Saraswat, Electrical
Engineering Department
PROJECT: Three Dimensional Process Modeling
"We've been doing work on three dimensional process modeling
for VLSI metallization. These include metal and dielectric deposition
and etching. AMD has provided some test wafers so I can verify my
models.
"At Stanford my thesis work focuses on modeling and simulating
metal deposition for VLSI fabrication. AMD has processed some wafers
using a test pattern I created over a summer internship. The advantage
of having the wafers processed at AMD over Stanford, is that AMD has
access to the most recent manufacturing equipment; so my thesis work is
more relevant to industry.
" David Bang, Ph.D. candidate, EE
"The main achievement of the AMD FMA program was a 3D
deposition code we are using to predict feasibilities of future
technologies, mainly dual damascene structures. David developed 3D
version based on 2D Speedie and interfaced it to commercial gridding
software. Results of the work were presented at SISDEP and IEDM
conferences." Zoran Krivokapic, AMD
3) FELLOW: Patrick Canupp, Aero/Astro
Department
MENTOR: Ralf Brinkmann, Siemens
AG
ADVISOR:
Robert MacCormack, Aero/Astro
Department
PROJECT: Plasma reactor simulation
"We are developing a numerical technique for simulating the
neutral gas component of etching plasmas. The fellowship has fostered
close interaction between myself and the Equipment Simulation Group at
Siemens." Patrick Canupp, Ph.D. candidate, Aero/Astro

Ralf Brinkmann/Patrick Canupp
"Both our experiences with the FMA program have demonstrated
to us that a collaboration between CIS and Siemens Corporate Research
is possible, even though there are several thousand miles (and nine
hours) in between. Especially helpful was the willingness of Peter
(Smeys) to come to Siemens quite often; also Patrick's stay a couple of
months ago was fruitful." Ralf Brinkmann, Siemens AG
4) FELLOW: David Shen, Electrical
Engineering Department
MENTOR: Gitty Nasserbakht, Texas
Instruments
ADVISOR: Bruce Wooley,
Electrical Engineering
Department
PROJECT: Microchip radio
"Texas Instruments was responsible for the fabrication of my
radio receiver prototype, presented in the February Solid State
Circuits Conference. I have recently met with several members of the
Integrated Systems Laboratory at Texas Instruments during the ISSCC
conference."
"While working on my chip design, I created design rule
checking, layout entry, and layout extraction files in order to use the
CAD tools at Stanford to design the chip. The data from the Stanford
tools was then translated into a format that TI uses internally." David
Shen, Ph.D. candidate, EE
"The semiconductor R&D division of TI has long been
involved in collaborative research with Stanford. One of the best forms
of such collaboration has been through the FMA program. Geographical
limitations have not kept us from staying in close contact.
"I have met with David on several occasions during my
on-campus visits, as well as meetings at ISSCC conferences in San
Francisco. David also visited TI on one occasion to do a final review
of his design. David's research resulted in an IC chip fabricated in
TI's BiCMOS technology and shipped to Stanford for testing.
"As a result of the success of our current FMA program with
David, we plan to continue our support of Prof. Wooley's research
activities by extending another FMA fellowship to the student who will
be continuing David's research. The student will be spending the summer
quarter at TI -- no doubt the start of another very successful FMA
relationship, and I look forward to reporting another success story in
the near future." Gitty Nasserbakht, TI
5) FELLOW: John Heinlein, Electrical Engineering Department
MENTOR: Dave Archer, Intel Corporation
ADVISOR: Anoop Gupta, Computer
Science Department
PROJECT: Leveraging a programmable protocol processor for accelerated
multiprocessor communication and synchronization

John Heinlein
"My Intel mentor and I have been working together for several
years now, beginning in 1994 when Intel and Stanford were collaborating
on the design of a next generation supercomputer. My role was to design
and implement a protocol for high bandwidth message passing
communication within a hardware cache coherent shared memory system.
More recently I have finished the implementation of this protocol for
the Stanford: FLASH
(FLexible Architecture for SHared memory) multiprocessor system. I
recently traveled to Portland, Oregon, to participate in the Intel
Graduate Foundation Fellowship Forum, in which recipients of Intel
fellowships from around the country came to describe their research."
John Heinlein, Ph.D. candidate, EE
"The FMA program in general, and my mentoring relationship
with John Heinlein in particular, show great promise for mutual benefit
of industry and academia. Interaction between Stanford students and
Intel technical staff has increased the understanding and technical
excellence of both. The mentoring relationship offers unique benefits
to student and mentor alike. The sole reservation I've noted in this
endeavor to date is that there's never enough time available for mentor
involvement to obtain the optimal benefit for student and mentor." Dave
Archer, Intel
6) FELLOW: Justin Leung, Electrical
Engineering Department
MENTOR: Barbara Vasquez, Motorola
ADVISOR: Simon Wong, Electrical Engineering Department
PROJECT: Development of an active substrate membrane probe card

Justin Leung
"My relationship with Motorola began when I had the
opportunity to spend a summer working in Dr. Vasquez's group in
Phoenix, characterizing known-good-die burn-in technology. Afterwards,
we kept in touch periodically and entered into a more formal mentoring
relationship this past year as part of the FMA fellowship. One of our
interactions included an invitation by Dr. Vasquez to present a talk
describing our research at the Motorola Science Advisory Board
Associates meeting held in San Antonio, TX last October." Justin Leung,
Ph.D. candidate, EE
"Recently, Justin has been the recipient of support through
Motorola's university research program sponsored by the Motorola
Scientific Advisory Board Associates (SABA), of which I am a member. In
his research under the direction of Professor Simon Wong, Justin has
been responsible for significant improvements on a novel membrane probe
card technology. At our request, Justin presented his work at a
Motorola technical review last October. Of all the university research
sponsored by the SABA, Justin was awarded the 'Best Student Paper of
the Year' award. I had the pleasure of delivering the plaque to Justin
during a small celebration of his award at Stanford last December."
Barbara Vasquez, Motorola
Quality In, Quality Out
by Richard
M. Reis
Executive Director
In our last issue I described the CIS, CAReer
Enhancement Services (CARES) program designed to: (1) bring the best
graduate
students to Stanford, (2) expose them to enriching experiences while at
Stanford, and (3) provide them with career opportunities with our
partners after their graduation from Stanford. In this article I will
concentrate on how CARES helps bring the best electrical engineering
bachelor's degree graduates to Stanford.
Stanford's ability to produce master's and doctorate graduates
who are among the best in the world depends, in part, on its ability to
attract the top bachelor's graduates into the University. Stanford's
world-wide reputation ensures that the vast majority of the best
undergraduates seeking to go to graduate school in such areas as
electrical engineering, computer science and related fields, will apply
to, and be accepted by, the University. Yet, acceptance does not always
mean enrollment. Most of our highest ranked applicants also apply to,
and are accepted by, other top U.S. schools such as Carnegie Mellon
University, the Massachusetts Institute of Technology, the University
of California at Berkeley, and the University of Illinois. While there
is much competition among these schools, it is always Stanford's
intention to enroll more than its "fair share" of the best students.
Financial aid is a necessary, but not sufficient condition in
such recruitment efforts. We also need to show these students what is
so special about Stanford/CIS and why it will be to their benefit to
attend Stanford.
When CIS began its recruitment efforts a decade ago we had to
explain to prospective students what the Center was about and why it
presented them with a unique opportunity. In the last few years the
situation has reversed itself, and CIS has become a magnet that
actually draws some applicants to Stanford. The Center's outstanding
facilities, its Fellow-Mentor-Advisor (FMA and SPIE programs,
and the potential for significant industrial interactions, all
contribute to the attraction, as of course do its outstanding
affiliated faculty and graduate students.
CIS recruitment activity, focusing on top applicants
interested in CIS related research areas, is part of a larger Electrical Engineering Department
recruitment effort under the direction of Professor Fabian Pease
(Admissions Chairman), Lori Fabrizio (Director of Admissions), and
Patricia Goodrich (Admissions Administrator).
Personal telephone calls and extensive e-mail exchanges among
applicants and electrical engineering students, staff and faculty is a
key part of the recruitment effort. So too, are weekly mailings to
applicants of The Stanford Daily
and Stanford Report newspapers. (We want them to feel they are part of
our family even before they enroll).
Of particular significance is the electrical engineering
department's EE Recruitment Day, held in March, and to which all
applicants are invited. This event draws over 100 applicants, features
presentations by faculty, tours of electrical engineering facilities,
informal discussions with graduate students, and a panel of graduate
students who speak frankly about their Stanford experiences. Our key
effort is to make students feel that we really want them to come to
Stanford. We realize we have a lot to offer them, and know they have
much to offer Stanford. We therefore seek every opportunity to convey
this message to them.
So, how did we do? Preliminary results for this year's
recruitment efforts (for the incoming 1996-97 class) indicate that
approximately 40% of the top 70 applicants have decided to enroll at
Stanford. This figure, which could still increase slightly when all
decisions are made, is particularly impressive considering that the
vast majority of these 70 applicants also applied to the other top
schools mentioned above. Final figures for women and minority students
are not yet in, but preliminary suggest an increase over last year.
Of course, having the top students decide to enroll at
Stanford/CIS is only the beginning. In our next issue I will highlight
some of the things CARES is doing to enrich their experiences while at
CIS.
"Let There Be TriMedia, and Lo..."
A Philips Project History and CIS
Much of the focus this year in semiconductor
research is
a new wave of microprocessors specializing in multimedia. As number
crunching becomes inadequate, and PCs transcend words, general-purpose
CPUs, along with a new generation of PCs, are adapting to the demands
of multimedia, by handling audio, video, graphics, and communications
as easily as word processing.

Uzi Bar-Gadda, Manager, Philips Research Labs, Palo Alto
Dr. Uzi Bar-Gadda, Manager of Philips Research Labs in Palo
Alto (PRPA) and the Philips representative to the CIS Advisory
Committee, recently spoke with Rick Reis concerning TriMedia, the
latest multimedia product offered by Philips, and one whose development
was connected with the Stanford environment at CIS.
Long interested in video applications, Philips was
developing projects related to video signal processors (VSP) with
programmability from the early to mid 1980s -- the same time in which
Gert Slavenburg was a CIS Visiting Fellow from Philips, working mostly
with
David
Cheriton, Stanford professor of computer system design.
Philips, looking to pull in some of the leading ideas with no
direct applications as yet, values university relationships, and takes
full advantage of the collaboration between industry and academia, an
environment which allows these ideas to develop. According to
Bar-Gadda, the Stanford atmosphere, especially the work being done at
Stanford on RISC (Reduced Instrution Set Computing) and the MIPS chip,
influenced both the compiler and the software architecture of TriMedia.
Bar-Gadda stated: "I'd liken it to a biological process, with
cross-pollination between industry and the university, particularly in
a world of support for product development people. The path is
sometimes direct and conscious, sometimes indirect and unconscious, but
the Stanford University environment provides you with an atmosphere of
creativity in which new ideas jostle people's brains and lead to a
chain reaction. Of course how it happens is pretty mysterious, and you
can't point to any moment, any single event, in particular, as it is a
stochastic, and not a deterministic process, but the academic context,
the chemistry that occurs being near a major university, is what makes
it possible.
"If one is only in, say a corporate, environment, one's view
of the outside world is filtered by a certain viewpoint. A university
connection lets those ideas the space and freedom to roam, to explore.
And while it is very difficult to trace exactly how the ideas developed
over the past 10 years, in that Philips did not benefit directly from
their CIS visiting fellows at any moment in particular, those people
learned things by being at CIS, and they communicated their thoughts,
in both direct and indirect ways, to people at Philips."
According to Bar-Gadda, "Looking for high-compute performance
beyond RISC, we got into multimedia -- a technology looking for an
application." Knowing that VLIW architecture was capable of executing
many operations within each clock cycle, it was used to develop
accelerated video processing. "We brought in Julien Labrousse, a
Philips designer with experience in interactive compact disc (CDI)
chips, and the group ended up creating a multimedia processor,
originally termed LIFE, first publicly announced at the 1989 Philips
Concern Research Exhibition in Eindhoven, and now available as
Trimedia."
TriMedia, the first fully programmable DSP/CPU, is capable of
concurrently processing audio, video, graphics and communications data
all on one chip, in what Philips terms/calls "concurrency." Instead of
adding DSP features to a CPU, which would simply add media capability,
but not result in multimedia, the TriMedia chip adds CPU features to a
DSP, with the result that the TriMedia chip is fully programmable. In
the course of their interactions at Stanford over the past 10 years,
Bar-Gadda and others at Philips saw that the technology being developed
in connection with Stanford had promise and a potential market
presence. Their contact with CIS assisted in the growth and development
of that idea, to say the least, and so gets some of the credit.
Congratulations Philips!
New NSF/SRC Engineering Research Center for
Environmentally Benign Semiconductor Manufacturing
Bob Helms, professor of electrical engineering,
recently
announced the funding of a concerted efforts to study the
environmental, health and safety aspects of the semiconductor
manufacturing process through a partnership with the
National Science Foundation
(NSF) and the Semiconductor Research
Corporation (SRC), with an offical starting date of April 15, 1996.
The NSF/SRC Engineering Research
Center (ERC) for Environmentally Benign Semiconductor Manufacturing
(EBSM) proposes a unique multidisciplinary, multiuniversity science
push approach to provide critical new environmentally benign
technologies for semiconductor manufacturing in the next decade and
beyond. In addition to the exciting research opportunities in this
area, new models for graduate education have been proposed in which the
"virtual Center" provides a homebase for a new breed of student, who
can access resources of all the Center universities.

John DeGenova (TI), graduate student Simon Fang, and Bob Helms
with Ellipsometry System
The vision for the Center is to create a unique and focused
program in
which faculty and students from various disciplines and institutions
come together with industry and government agencies, and work toward
these objectives:
- Conduct fundamental research studies which will provide the
basis for making rational changes in semiconductor processes for
environmental improvement.
- Develop a methodology for incorporating the environmental
safety and health factors in developing new processes, new tools and
new protocols for semiconductor manufacturing. The focus is on process
modification, factory integration, chemical use minimization and
recycling.
- Apply this methodology to specific processes which are of
significant environmental concern.
- Develop new educational programs and modify existing ones
to teach environmental factors as an integrated part of the engineering
courses and projects. The purpose is to train a generation of engineers
and scientists who will help industry achieve its long-term
environmental goals.
- Provide a pre-competitive forum for bringing experts from
industry, research institutions and regulatory agencies together to
promote a pro-active and preventative approach to environmental
concerns on semiconductor manufacturing.
The Center management team consists of the Center director
(Farhang
Shadman, professor of chemical and environmental engineering,
University of Arizona), and two associate directors (C. Robert Helms,
professor of electrical engineering, Stanford University and Rafael
Reif, professor of electrical engineering, MIT). The Stanford team
includes Bob Helms as overall Center co-director, Chris Chidsey of the
chemistry department, and Greg
Kovacs
and Jim McVittie in electrical engineering.
An essential issue for the semiconductor industry is the
development and use of environmentally sound manufacturing processes.
One focus is the large amount of highly purified water required to
rinse and clean a silicon wafer. The semiconductor industry is
interested in reducing water use through innovative technology
development. There is also a need to minimize the amount of energy
required to manufacture microchips.
The new Center will work in partnership with firms from the
semiconductor industry. These firms will interact with faculty and
students in research, and provide opportunities for student interns
both to learn the manufacturing process firsthand and also to
contribute solutions for industrial problems while they are still in
school. ERC for EBSM graduates will be part of a new generation of
engineers capable of integrating environmentally conscious concepts
up-front in the design of manufacturing processes.
For more information, contact:
Prof. Bob Helms
helms@ee.stanford.edu
CIS Tours HP Palo Alto Labs
On March 29, 1996, CIS sponsored a "Get To Know HP
Labs
Day," with approximately 45 graduate students, mostly in EE and CS,
visiting and touring the Hewlett Packard Laboratories on Deer Creek
Road in Palo Alto, as well as hearing presentations by a variety of HP
Labs personnel.
The visit was organized by Paul Rissman, manager, advanced
process research department, ULSI Research Lab in HP Labs and CIS
visitor as a representative of Hewlett Packard, a CIS
Partner
Company.
In addition to Rissman, HP Labs speakers included Richard
Marconi, Manager of technical communications, who gave an Introduction
to HP Labs, Art Muto, Project Manager of the High Speed Electronics
Department, Wes Higaki, of the Measurement Systems Department, Ed
Middlesworth of the Intergrated Circuits Business Division's (ICBD)
Technology Development Department, Rolf Jaeger, Manager Device
Technology Department on Micromachining Research at HP Labs, and
Stephen Laderman, Materials Characterization Project Manager.
The presentations highlighted just a few of HP's exciting
technologies. Among the recent contributions of HP Laboratories
presented were an air-cooled package for the latest Precision
microprocessor capable of dissipating 80 Watts, ASICS for interfacing
communication systems, new materials and processes for optoelectronics,
and a thermally actuated micromachined valve for a gas chromatography
system.

A typical day at the HP Labs
In addition to the presentations,Russ Parker and Paul Rissman
led four
groups of approximately ten students each on thirty-minute tours of
both the Measurement Research Center and the Computer Research Center.
The Measurement Research Center has technical programs in
photonics, high-speed electronics, measurement systems, medical and
analytical instrumentation and systems, epitaxial materials,
micromechanics, device processing, precision instruments and
manufacturing technology.
Programs in the Computer Research Center focus on computer
architecture, printing technology, mass storage, database management,
object technology, multimedia systems and software engineering.
The visit, tours, presentations and meals were appreciated by
all in attendance, as evidenced by the plethora of questions. The food
was great, the interchange of questions and answers encouraging, and
the interrelationship between the basic research (invention) occurring
at universities including Stanford and the applied research
(innovation) occurring at HP Labs was much in evidence.
THANKS HP PALO ALTO LABS!
CIS Newsletter
The CIS Newsletter is published four times a year. Articles,
letters, and photos are welcomed: send them to the CIS Newsletter,
c/o Center for Integrated Systems, Stanford University, Stanford, CA
94305-4070. Opinions expressed in the Newsletter are those of
the authors.
Editor:
Harrianne Mills
650/725-3626
Return to CIS home
page.
Send comments, suggestions to: coordinator@cis.stanford.edu
Updated 9/19/96
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