Time
|
Event |
Speaker |
8:30
|
Welcome
|
Prof.
Yoshio
Nishi, (CIS Director of Research & EE Department)
|
8:45
|
Challenges in Organic Circuit Design
|
Wei Xiong/Prof. Boris Murmann, (EE
Department), Slides
|
9:15
|
A Wireless Transmitter with an Integrated Tunable High-Q
RF Filter
|
Bob Wiser/Prof. Bruce Wooley, (EE
Department), Slides
|
9:45
|
Digital Compensation of Dynamic Acquisition Errors at the
Front-End of ADCs
|
Parastoo Nikaeen/Prof. Boris Murmann, (EE
Department), Slides
|
10:30
|
Globally Optimized Robust System Design
|
Prof. Subhasish Mitra, (EE/CS
Departments), Slides
|
11:00
|
Large-Scale Gate Sizing and New Optimization Modeling Tools
|
Prof. Stephen Boyd, (EE
Department), Slides |
11:30
|
The Stanford Clean Slate Program: An Overview
|
Guru Parulkar, (EE/CS
Departments), Slides
|
1:00
|
High Performance FPGA Architectures
|
Bita Nezamfar/Prof. Mark Horowitz, (EE
Department), Slides
|
1:30
|
Efficient Embedded
Computing
|
Prof. William
Dally, (EE/CS
Departments), Slides |
2:00
|
Measuring Supply Current in Printed Circuit Boards
|
Jim Weaver/Prof. Mark Horowitz, (EE
Department), Slides
|
2:30
|
Raksha: A Flexible Information Flow Architecture for
Software Security
|
Prof. Christos Kozyrakis, (EE/CS
Department), Slides
|
3:00
|
3D-FPGA
|
Prof. Abbas El
Gamal, (EE/CS
Department), Slides
|
3:45
|
Panel
Discussion
|
|
