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  Recent Ph.D. Dissertations

  Invited & Keynote

  Regular Papers

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    Last updated on June 17, 2007.


Recent Ph.D. Dissertations
  1. Charles M. Perkins, , 2007
  2. Ali Kemal Okyay, Si-Ge Photodetection Technologies for Integrated Optoelectronics , 2007
  3. Hoon Cho, Low Power, Highly Scalable, Vertical Flash Memory Cell and MOSFET , 2007
  4. Abhijit Pethe, Ge-Based Transistors for High-Performance Logic Applications , 2007
  5. Hoyeol Cho, Performance Comparison Between Copper, Carbon Nanotube, and Optics for Off-Chip and On-Chip Interconnects , 2007
  6. Tejas Krishnamohan, Physics and Technology of High Mobility, Strained Germanium Channel, Heterostructure MOSFETs , 2006
  7. Jungyup Kim, Effective Germanium Surface Preparation Methods for Nanoelectronic Applications , 2006
  8. Ammar Nayfeh, Heteroepitaxial Growth of Relaxed Germanium on Silicon , 2006
  9. Kang-Ill Seo, , 2006
  10. Dan Connelly, , 2005
  11. Chi On Chui, Advanced Germanium Complementary-Metal-Oxide-Semiconductor Technologies , 2004
  12. Ting-Yen Chiang, Electrothermal Analysis of VLSI Interconnects , 2004
  13. Nabeel Ibrahim, Dopant Diffusion and Deactivation in Silicon in the Presence of Metal Silicides , 2007
  14. Rohit Shenoy, Technology and Scaling of Ultrathin Body Double-Gate FETs , 2004
  15. Hyoungsub Kim, , 2004
  16. Shukri Souri 3D ICs Interconnect Performance Modeling and Analysis , 2003
  17. Marci Liao, Environmentally Benign Semiconductor Processing for Dielectric Etch , 2003
  18. Amol Joshi, High Performance CMOS With Metal Induced Lateral Crystallization of Amorphous Silicon , 2002
  19. Ben Shieh, The Use of Air-Gaps to Lower IC Interconnect Capacitance , 2002
  20. Pranav Kalavade, , 2002

    Invited & Keynote
    1. K. C. Saraswat, "VLSI Interconnections Technology, Present and Future," 9th Annual EOS/ESD Symp. Orlando, Florida, September 1987. (Keynote Address)
    2. K. C. Saraswat, "Single Wafer In-situ Multiprocessing," Semicon Japan Digest of Technical Papers, November 1988, Tokyo. (Keynote Address)
    3. J. D. Meindl, K. C. Saraswat and J. D. Plummer, The Need of Process Models in an Ubiquitous Technology, The Electrochemical Society, Inc., Princeton, New Jersey, 1977, pp. 894~909. (Invited)
    4. K. C. Saraswat and F. Mohammadi, "Tungsten Silicide for MOS Gates and Low Resistivity Interconnections," AIME, Ithaca, Cornell University, June 1980, The 22nd Electronics Materials Conference. (Invited)
    5. J. D. Meindl, N.K. Ratnakumar, L. Gerzberg and K. C. Saraswat, "Circuit Scaling Limits for Ultra-Large-Scale Integration," Technical Digest of the International Solid State Circuits Conference, New York, February 1981. (Invited)
    6. K. C. Saraswat, "WSi2 Interconnections for VLSI," International Conference on Metallurgical Coatings, San Francisco, April 1981. (Invited)
    7. K. C. Saraswat, "Physical and Electrical Properties of Polycrystalline Silicon Thin Films," Proceedings of Symposium on Grain Boundaries in Semiconductors, Materials Research Society, Boston, November 16~19 1981, pp. 261~274, Volume 5. (Invited)
    8. K. C. Saraswat, "Refractory Metal Silicides for Interconnections in VLSI," American Physics Society, Dallas, March 1982. (Invited)
    9. K. C. Saraswat, "Refractory Materials for Interconnections in VLSI," AIME Electronic Materials Conference, Vermont, June 1983. (Invited)
    10. D.C. Paine, J.C. Bravman and K. C. Saraswat, "Microstructural Characterization of LPCVD Tungsten Interfaces," In Proceedings of Workshop on Tungsten and other Refractory Metals for VLSI Applications, Albuquerque, , pp. 117~123, Edited by R.S. Blewer, October 1985. (Invited)
    11. K. C. Saraswat, "Refractory Metals and Silicides for VLSI Applications," Presented at 32nd Symp. American Vac. Soc. . Houston, November 1985. (Invited)
    12. K.C. Saraswat, "Use of Silicides Obtained by CVD in VLSI," Presented at the Workshop on Silicides. Florence, Italy, October 1985. (Invited)
    13. M. Moslehi, K. C. Saraswat and S.C. Shatas, "Rapid Thermal Growth of Thin Insulators on Silicon," Presented at the SPIE's O-E/LASE '86, January, 1986, Los Angeles. (Invited)
    14. K. C. Saraswat, "Interconnections for VLSI," International Conf. on Semiconductor and Integrated circuit Technology, Beijing, China, October 1986. (Invited)
    15. K. C. Saraswat, F. C. Shone and J. D. Plummer,"Modeling of Dopant Diffusion and Redistribution in WSi2/Si Structures," Workshop on Metals, Dielectrics, and Interfaces for VLSI, San Juan Batista, May 9~12, 1988. (Invited)
    16. K. C. Saraswat, P. Wright, S. Wood and M. M. Moslehi, "Single Wafer In-situ Multiprocessing," 1989 Int. Symp. on VLSI Technology, Systems and Applications, May 1989, Taipei. (Invited)
    17. K. C. Saraswat, M. M. Moslehi, D. D. Grossman, S. Wood, P. Wright and L Booth "Single Wafer Rapid Thermal Multiprocessing: A New Concept in Manufacturing," Proceedings of MRS Symp. on Rapid Thermal Annealing/CVD and Integrated Processing, Vol. 146, pp. 3--13., Materials Research Society, April 1989, San Diego. (Invited)
    18. K. C. Saraswat, L. Booth, D. D. Grossman, B. T. Khuri-Yakub, Y. J. Lee, M. M. Moslehi, and S. Wood, "Rapid Thermal Multiprocessing for Micro Factories," 1989 SPIE Symp. on Microelectronic Processing, 8~11 October 1989, Santa Clara. (Invited)
    19. J.P. McVittie, A.J. Bariya, J.C. Rey, S. Ravi, K. C. Saraswat, M.M. Islam Raja and L-Y. Cheng, "SPEEDIE Simulation of Profile Evolution During Etching and Deposition," SPIE Symp. on Microelectronic Processing Integration, October 1990, Santa Clara, SPIE Proceedings Vol. 1392. (Invited)
    20. S. Wood, P.P. Apte, K. C. Saraswat J.M. Harrison, "Economic Impact of Single Wafer Multiprocessors," Proc. SPIE Symp. on Rapid Thermal and Related Processing Techniques, October 1990, Santa Clara, Vol. 1393, pp. 36~48. (Invited)
    21. B.T. Khuri-Yakub, K. C. Saraswat, Y. J. Lee and S. Bhardwaj, "photoacoustic Technique for Thin Film Thickness and Temperature Measurements in Semiconductor Processing," Workshop on Tungsten and Other Advanced Metals for ULSI Applications VII, Dallas, October 1990. (Invited)
    22. K. C. Saraswat, "Adaptable IC Manufacturing Systems for the 21st Century," E-MRS, 1993 Spring Meeting, Strasbourg, May 4-7, 1993. Published in Microelectronic Engineering, vol. 25, (1994), pp. 131~137. (Invited)
    23. K. C. Saraswat, Y. Chen, L. Degertekin, and B. T. Khuri-Yakub, "A New Flexible Rapid Thermal Processing System," Proc. MRS Symp., Rapid Thermal and Integrated Processing IV, Vol. 387, pp. 35~57, 1995. (Invited)
    24. K. C. Saraswat, Y. Chen and B. T. Khuri-Yakub, "Modeling Measurements and Control of Rapid Thermal Processing," In Transient Thermal Processing Techniques in Electronic Materials, Edited by N.M. Ravindra and R.K. Singh, Proc. TMS Symp., Anaheim, Feb. 1996, pp. 3~10. (Invited)
    25. K. C. Saraswat, "Scaling Limits for Interconnect Technology," VLSI Multilevel Interconnect Conference, State-of-the-art Seminar, Santa Clara, June 21, 1996. (Invited)
    26. K. C. Saraswat, S. Jurichich, T. J. King, V. Subramanian, and A. Wang, "A Low Temperature Polycrystalline SiGe CMOS TFT Technology for Large Area AMLCD Drivers, TFT III Symp., 190th meet. Electrochem. Soc., San Antonio, October 1996. (Invited)
    27. K. C. Saraswat, S. Jurichich, V. Subramanian, and A. Wang, "A low temperature polycrystalline Si TFT technology for large area AMLCD drivers," MRS spring meeting, April 1997, San Francisco. (Invited)
    28. K. C. Saraswat, N. Bhat and T. C. Yang, "Effect Of Interface Stress on Reliability of Gate Oxide," 4th Symp. on Silicon Nitride and Silicon Oxide Thin Insulating Films, 191st Meeting of the Electrochem. Soc., Montreal, Canada, May 1997. (Invited)
    29. K. C. Saraswat and V. Subramanian, "Seeding Technology for High Performance TFTs," Proc. Electronic Display Forum 98, EIAJ/SEMI, Yokohama April 1998, pp.2.7~2.15. (Invited)
    30. K. C. Saraswat and T. C. Yang "Dependence of Oxide Electric Field and Gate Electrode Workfunction on the Reliability of Thin MOS Gate Oxides," Abs. No. 123 in Proc 195th Meeting of the Electrochem. Soc., Seattle, May 1999. (Invited)
    31. Krishna C. Saraswat, "Polycrystalline-SiGe applications in Si CMOS Technology," Proc. Int. Conf. on Silicon Epitaxy and Heterostructures, September 1999, Japan. (Invited)
    32. K. C. Saraswat, S. J. Souri, V. Subramanian, A. R. Joshi, and A. W. Wang, "Novel 3-D Structures," Proc. 1999 IEEE Int. SOI Conf. pp.54-55, October 4-7, 1999. (Invited)
    33. K. C. Saraswat, K. Banerjee, A. R. Joshi, P. Kalavade, S. J. Souri and V. Subramanian, "3-D ICs: Performance Analysis, and Technology," 197th Meeting of the Electrochem. Soc., Toronto, May 2000. (Invited)
    34. K. C. Saraswat, K. Banerjee, A. R. Joshi, P. Kalavade, P. Kapur and S. J. Souri, "3-D ICs: Motivation, Performance Analysis, and Technology" 26th European Solid-State Circuits Conference, Stockholm, Sweden, September 2000. (Invited)
    35. J. A. Davis, R. Venkatesan, A. Kaloyeros, M. Beylansky, S. J. Souri, K. Banerjee, K. C. Saraswat, A. Rahman, R. Reif, and J. D. Meindl, "Interconnect Limits on Gigascale Integration(Gsi) In The 21st Century," Proc. IEEE, Vol. 89, No. 3, March 2001, pp. 305~324. (Invited)
    36. K. Banerjee, S. J. Souri, P. and K. C. Saraswat, "3-D ICs: A Novel Chip Design for Improving Deep Submicron Interconnect Performance and Systems-on-Chip Integration," Proc. IEEE, Vol. 89, No. 5, May 2001, pp. 602-633. (Invited)
    37. K. Banerjee, S. J. Souri, P. Kapur, K. C. Saraswat, "3-D Heterogeneous ICs: A Technology for the Next Decade and Beyond, 5th IEEE Workshop on Signal Propagation on Interconnects," Venice, Italy, May 2001. (Invited)
    38. Krishna Saraswat, P. Kapur, G. Chandra, T.-Y. Chiang, S. Souri, "Scaling Induced Performance Limitations of Metal Interconnects," IEEE ISSCC Microprocessor Design Workshop, San Francisco, February 2002. (Invited)
    39. P. Kapur, G. Chandra and K. C. Saraswat, "Performance Limitations of Metal Interconnects and Possible Alternatives," Presented at the SEMICON, San Francisco, July 2002. (Invited)
    40. K. C. Saraswat, "Collaborative Research Centers in USA in Electronics," Opening Ceremony of the National Nanotechnology Researchers Network Centers of Japan, Tokyo, Nov. 25, 2002. (Plenary talk)
    41. K. C. Saraswat, P. Kapur and S. Souri, "Performance Limitations of Metal Interconnects and Possible Alternatives," 203rd Meeting of the Electrochem. Soc., Paris, April 2003. (Invited)
    42. K. C. Saraswat, C. O. Chui, P. C. McIntyre and B. B. Triplett, "Novel Germanium Technology and Devices for High Performance MOSFETs and Integrated On-chip Optical Clocking," 203rd Meeting of the Electrochem. Soc., Paris, April 2003. (Invited)
    43. K. C. Saraswat, "Multi University Research Centers in USA for Device and Interconnect Research," Advanced Metallization Conference 2003, Tokyo, Japan, September 2003. Keynote talk
    44. C. O. Chui, H. Kim, J. P. McVittie, B. B. Triplett, P. C. McIntyre, and K. C. Saraswat, "A Novel Self-aligned Gate-last MOSFET Process Comparing the High-k Candidates," IEEE 2003 International Semiconductor Device Research Symposium (ISDRS) Proceedings, pp. 464-465, Washington, DC, December 10-12, 2003.Invited
    45. P. McIntyre, H. Kim, D. Chi, C. O. Chui, B. Triplett, A. Javey, H. Dai, and K. C. Saraswat, "Novel Deposition Processes for High-k/Ge Devices: Interface Engineering," to be presented in MRS 2004 Spring Meeting, Symposium on Joint Session: High-k and High Mobility Substrates, Paper B5.1/D5.1, San Francisco, CA, April 12-16, 2004. Invited
    46. K. C. Saraswat, "Performance Limitations of Devices and Interconnects and Possible Alternatives for Nanoelectronics," IEEE Symp. Quality Electronic Design, San Jose, March 24, 2004. Plenary talk.
    47. K. C. Saraswat, "3-Dimensional ICs: Motivation, Performance Analysis and Technology," SEMATECH Conf. on 3D Architectures for Semiconductor Integration and Packaging, April 13-15, 2004, San Francisco. Invited
    48. C. O. Chui and K. C. Saraswat, "Low Thermal Budget Ge MOS Technology," 205th Meeting of The Electrochem. Soc., Abs. No. 254, San Antonio, May 2004. Invited
    49. K. C. Saraswat, "Ge Based High Performance Nanoscale MOSFETs and Integrated Optical Interconnects", US-India Workshop on Nanotechnology, Bangalore Aug. 11-13, 2004. Invited
    50. K. C. Saraswat, C. O. Chui, T. Krishnamohan, A. K. Okyay, H. Kim and P. McIntyre, "Ge and SiGe for High Performance MOSFETs and Integrated Optical Interconnects", Int. Conf. on Solid State Dev. And Mat. (SSDM), Tokyo, July 2004. Invited
    51. K. C. Saraswat, C. O. Chui, A. Neyfeh, H. Kim and P. McIntyre, "Ge Surface Passivation for High Performance MOSFETs", IEEE SISC Conf. San Diego, Dec. 2004. Invited
    52. K. C. Saraswat, C. O. Chui, T. Krishnamohan, A. Nayfeh and R. Shenoy, "Performance Limitations of Devices and Interconnects and Possible Alternatives for Nanoelectronics," IEEE Advanced Workshop on 'Frontiers in Electronics' WOFE 2004, Aruba, Dec. 2004. Invited
    53. K. C. Saraswat, C. O. Chui, A. Nayfeh, H. Kim, A. K. Okyay and P. C. McIntyre, "Ge Based High Performance Nanoscale MOSFETs and Integrated Optical Interconnects", SEMI Technology Symposium (STS) 2005, Seoul, Korea, February 2005. Invited
    54. K. C. Saraswat, C. O. Chui, T. Krishnamohan, A. Nayfeh and R. S. Shenoy, "Performance Limitations of Si CMOS and Alternatives for Nanoelectronics", The 2005 SEMI-ECS International Semiconductor Technology Conference (ISTC) March 15-17, 2005, Shanghai. Invited
    55. K. C. Saraswat, C. O. Chui, T. Krishnamohan, A. Nayfeh and P. C. McIntyre, "Ge Based High Performance Nanoscale MOSFETs", MRS 2005 Spring Meeting, Symposium on Advanced Gate Dielectric Stacks on High-Mobility Semiconductors, Paper G14.1, San Francisco, CA, March 28-April1, 2005. Invited
    56. K. C. Saraswat, C. O. Chui, T. Krishnamohan, A. Nayfeh, H. Kim and P. McIntyre, "Ge Based High Performance MOSFETs", Int. Conf. on Insulating Films on Semiconductors (INFOS), Leuven, Belgium, June 2005. Invited
    57. K. C. Saraswat, "The Need for New Materials to Scale CMOS Devices", IEEE Int. Symp. On Semiconductor Manufacturing (ISSM), San Jose, Sept. 2005. Invited
    58. K. C. Saraswat, A. Nayfeh and C. O. Chui, "Gate Dielectrics for Ge MOS Technology" 208th Meeting of The Electrochem. Soc., Abs. No. 489, Los Angeles, October 2005. Invited
    59. P.C. McIntyre, H. Kim, K-I. Seo, C.O. Chui, B.B. Triplett, D-I. Lee, P. Pianetta, S. Stemmer and K.C. Saraswat "Interface Engineering for High-k/Si and High-k/Ge StructuresÕÕ Mishima Japan conference paper, Invited .
    60. K. C. Saraswat, C. O. Chui, T. Krishnamohan, A. Nayfeh, "Innovative Device Structures And New Materials For Nanoelectronics", IWPSD, 2005, New Delhi, India, Dec. 2005. Invited
    61. K. C. Saraswat, "Performance Limitations of Si CMOS and Alternatives for Nanoelectronics", iMAPS India National Conference on Microelectronics & VLSI, IIT Bombay, India, Dec. 19-21, 2005. Invited
    62. T. Krishnamohan, D. Kim, C. Nguyen, C. Jungemann, Y. Nish and K. C. Saraswat, "High Mobility, Low Band To Band Tunneling (BTBT), Strained Germanium, Double Gate (DG), Heterostructure FETs : Simulations", IEEE Trans. Electron Dev., Vol. 53, No. 5, May 2006, pp. 1000-1009. Invited
    63. T. Krishnamohan, Z. Krivokapic, K. Uchida, Y. Nish and K. C. Saraswat, "High Mobility, Ultra Thin (UT), Strained Ge MOSFETs On Bulk and SOI With Low Band To Band Tunneling (BTBT) Leakage : Experiments", IEEE Trans. Electron Dev. Vol. 53, No. 5, May 2006, pp. 990-999. Invited
    64. K. C. Saraswat, C. O. Chui, T. Krishnamohan, D. Kim, A. Nayfeh and A. Pethe, "High Performance Germanium MOSFETs", Symp. B, E-MRS IUMRS ICEM Spring Meet., Nice (France), May 29 - June 2, 2006. Published in Materials Science and Engineering: B, Vol. 135, No. 3 , 15 Dec. 2006, pp.242-249. Invited
    65. K. C. Saraswat and T. Krishnamohan, "Physics and Technology of High Performance, Strained Germanium Channel, Heterostructure MOSFETs", IEEE Int. Workshop on Nano CMOS, Mishima, Japan. 2006. Invited
    66. P. McIntyre, D. Chi, C. Chui, H. Kim, K. Seo and K. Saraswat, "Interface Layers for High-k/Ge Gate Stacks: Are They Necessary?," Proc. Symp. SiGe and Ge Materials, Processing, and Devices, 210th Electrochem. Soc. Meet., Cancun, Mexico, Nov. 2006, Invited .
    67. K. Saraswat, "Germanium MOSFETs for Nanoelectronics," Proc. Symp. SiGe and Ge Materials, Processing, and Devices, 210th Electrochem. Soc. Meet., Cancun, Mexico, Nov. 2006, Invited .
    68. Ali K. Okyay, A. M. Nayfeh, K. C. Saraswat, A. Marshall, P. C. McIntyre and T. Yonehara, " Strain Enhanced High Efficiency Germanium Photodetectors in the Near Infrared for Integration with Si", Optics Letters, Invited
    69. K. C. Saraswat, C. O. Chui, T. Krishnamohan and A Pethe, "High Mobility Materials and Novel Device Structures for High Performance Nanoscale MOSFETs," IEEE Int. Electron Dev. Meet. San Francisco, Dec. 2006. Invited .
    70. K. C. Saraswat, "An Overview of Advanced Interconnect Solutions," 1st Int. Workshop on Interconnect Design and Variability, 2006, Bangalore, India, Dec. 28-29, Invited .
    71. K. C. Saraswat, "Collaborative Research Centers in USA in Electronics," Birla Institut of Technology & Science, Bangalore Campus, 27 Dec. 2006 Inaugural Address.
    72. K. C. Saraswat, "Research Through Collaboration between Academia and Industry," 2nd Int. Symp. on Solutions Research, Tokyo, Japan, March 2007. Invited
    73. K. C. Saraswat, "High Mobility Materials and Novel Device Structures for High Performance Nanoscale MOSFETs," 3rd International Nanotechnology Conference (INC3), Brussels, April 17, 2007. Invited
    74. K. C. Saraswat, "High Mobility Channel Materials for Future CMOS," 2007 VLSI-TSA Symposium, April 2007, Hsinchu, Taiwan. Invited
    75. K. C. Saraswat,"Performance Limitations of Cu/low-k Interconnects and Possible Alternatives," IEEE Int. Interconnect Tech. Conf., June 2007, San Francisco, Invited Short Course

      Book Chapters
    76. K. C. Saraswat, "Rapid Thermal Multiprocessing for a Programmable Factory For Manufacturing of ICs," in Advances in Rapid Thermal and Integrated Processing (Edited by F. Roozeboom), Kluwer Academic Publishers, Dordrecht, The Netherlands, 1996, pp. 375-414.
    77. 3-D IC Deep Submicron Interconnect Performance Modeling and Analysis, "S. J. Souri, T.-Y. Chiang, P. Kapur, K. Banerjee and K. C. Saraswat," In Interconnect Technology and Design for Gigascale Integration, (Edited by J. A. Davis and J. D. Meindl) Kluwer Academic Publishers, Boston, October 2003, pp. 325 - 382.
    78. K. C. Saraswat, C. O. Chui, P. Kapur, T. Krishnamohan, A. Nayfeh, A. K. Okyay, and R. S. Shenoy, "Performance Limitations of Si CMOS and Alternatives for Nanoelectronics," Frontiers in Electronics: Proceedings of the WOFE-04 (edited by H. Iwai, Y. Nishi, M. S. Shur, and H. Wong), World Scientific, New Jersey, 2006.
    79. C. O. Chui and K. C. Saraswat, "Nanoscale Germanium MOS Dielectrics and Junctions," Germanium-Based Technologies: From Materials to Devices (edited by C. Claeys and E. Simoen), Elsevier Science, 2007.
    80. C. O. Chui and K. C. Saraswat, "Advances Germanium MOS Devices," Germanium-Based Technologies: From Materials to Devices (edited by C. Claeys and E. Simoen), Elsevier Science, 2007.
    81. C. O. Chui and K. C. Saraswat, "Germanium Nanodevices and Technology," In Advanced Gate Stacks for High-Mobility Semiconductors (edited by A. Dimoulas, E. Gusev, P. McIntyre, and M. Heyns), Springer-Verlag, London.
    82. P. C. McIntyre, H. S. Kim and K. C. Saraswat, "Structural Evolution And Point Defects In Metal Oxide-Based High-K Gate Dielectrics," in Defects in High-k Dielectrics (Springer, 2006), pp. 109-120.

      Regular Paper

      1974
    83. K. C. Saraswat and J. D. Meindl, "H.V. Silicon-Gate MOS Integrated Circuits for Driving Piezoelectric Tactile Displays," ISSCC Digest of Technical Papers, ISSCC, 1974., pp. 164~165.

      1975
    84. K. C. Saraswat, J. D. Meindl and J. Berger, "A High Voltage MOS Switch," IEEE Journal of Solid-State Circuits, Vol. SC-10, June, 1975., pp. 136~142.
    85. K. C. Saraswat and J. D. Meindl, "Borsenic Bipolar Process," Technical Digest of the International Electron Device Meeting, Washington D.C., December 1975., pp. 437~439.

      1976
    86. K. C. Saraswat and J. D. Meindl, "A New Bipolar Process - Borsenic," IEEE Journal of Solid State Circuits, Vol. SC-11, August, 1976., pp. 495~499.
    87. T. I. Kamins, R. Reif and K. C. Saraswat, "Transient Response of Dopant Incorporation into Silicon Epitaxial Films," Extended Abstracts of Fall 1976 Meeting of the Electrochemical Society, Las Vegas, Nevada, October 1976, Abstract No. 230.

      1977
    88. K. C. Saraswat and J. D. Meindl, "Low Temperature Diffusion of Boron from Diborane Using Carbon Dioxide as Oxidant," J. Electrochemical Society, Vol. 124, No. 3, March, 1977., pp. 471~472.
    89. K. C. Saraswat and J. D. Meindl, "Epitaxial Silicon Growth on Ion Implanted Silicon," Extended Abstracts of the Spring 1977 Meeting of the Electrochemical Society, Philadelphia, PA, 1977, Abstract No. 116. Volume 77-1.
    90. R. Reif, T.I. Kamins and K. C. Saraswat, "Transient and Steady-State Response of the Dopant System of an Epitaxial Reactor: Growth Rate Response," Extended Abstracts of the Fall 1977 Meeting of the Electrochemical Society, Atlanta, October 1977, Abstract No. 350, Volume 77-2.
    91. J. D. Meindl, R.W. Dutton, K. C. Saraswat, J. D. Plummer, T.I. Kamins and B.E. Deal, Silicon Epitaxy and Oxidation, Noordhoff-Leyden, 1977, pp. 57~113, Edited by F. Van de Wiele, W.L. Engl and P.G. Jaspers.

      1978
    92. K. C. Saraswat and J. D. Meindl, "Breakdown Walkout in Planar p-n Junctions," Solid State Electronics, Vol. 21, June, 1978., pp. 813~819.
    93. R. Reif, T.I. Kamins and K. C. Saraswat, "A Model for Dopant Incorporation into Silicon Epitaxial Films," Extended Abstracts of the Spring 1978 Meeting of the Electrochemical Society, Seattle, May 1978, Abstract No. 208, Volume 78-1.
    94. R. Reif, T.I. Kamins and K. C. Saraswat, "Model for Dopant Incorporation into Silicon Epitaxial Films," 1978 Device Research Conference, Santa Barbara, CA, June 1978.
    95. T. I. Kamins, M.M. Mandurah and K. C. Saraswat, "Structure and Stability of Low-Pressure Chemically-Vapor-Deposited Silicon Films," Journal of Electrochemical Society, Vol. 125, No. 6, June, 1978., pp. 927~932.
    96. M. M. Mandurah,. K. C. Saraswat and T.I. Kamins, "Doping of Low-Pressure Chemically-Vapor-Deposited Silicon Films," Fall 1978 Meeting of the Electrochemical Society, Pittsburgh, PA, October 1978.
    97. R. Reif, T.I. Kamins and K. C. Saraswat, "Transient and Steady-State Response of the Dopand System of a Silicon Epitaxial Reactor: Transfer Function Approach," Journal of Electrochemical Society, Vol. 125, No. 11, November, 1978., pp. 1860~1866.

      1979
    98. R. Reif, T.I. Kamins and K. C. Saraswat, "A Model for Dopant Incorporation into Growing Si Epitaxial Films: I Theory," Journal of Electrochem Society, Vol. 126, No. 4, April, 1979., pp. 644~652.
    99. R. Reif, T.I. Kamins and K. C. Saraswat, "A Model for Dopand Incorporation into Growing Si Epitaxial Films: II. Comparison of Theory and Experiment," Journal Electrochemical Society, Vol. 125, No. 4, April, 1979., pp. 653~660.
    100. K. C. Saraswat, F. Mohammadi and J. D. Meindl, "Effect of Annealing on the Properties of Thin Films of WSi2," Extended Abstracts of the Spring 1979 Meeting of the Electrochemical Society, Boston, May 1979, Abstract No. 144, Volume 79-1.
    101. F. Mohammadi, K. C. Saraswat, J. Beaudouin and J. D. Meindl, "Silicide Formation by Laser Heating of Sputtered Refractory Metal Films on Silicon," Extended Abstracts of the Spring 1979 Meeting of the Electrochemical Society, Boston, May 1979, Abstract No. 146, Volume 79-1.
    102. M. M. Mandurah, K. C. Saraswat and T.I. Kamins, "Phosphorus Doping of Low Pressure Chemically-Vapor-Deposited Silicon Films," Journal of Electrochemical Society, Vol. 126, No. 5, June, 1979., pp. 1019~1023.
    103. F. Mohammadi, K. C. Saraswat and J. D. Meindl, "Kinetics of the Thermal Oxidation of Sputtered WSi2," Applied Physics Letters, Vol. 35, October, 1979., pp. 529--531.
    104. F. Mohammadi, K. C. Saraswat and J. D. Meindl, "Thermal Oxidation of Sputtered Thin Films of WSi2," Extended Abstracts of the Fall 1979 Meeting of the Electrochemical Society, Los Angeles, October 1979, Abstract No. 393, Volume 79-2.
    105. M. M. Mandurah, K. C. Saraswat and T.I. Kamins, "Dopant Segregation in Polycrystalline Silicon," Extended Abstracts of the Fall 1979 Meeting of the Electrochem Society, Los Angeles, October 1979, Abstract No. 571, Volume 79-2.
    106. R. Reif, M. Vanzi, R.W. Dutton, T.I. Kamins and K. C. Saraswat, "Initial Transients in the Silicon Deposition Process," Extended Abstracts of the Fall 1979 Meeting of the Electrochemical Society, Los Angeles, October 1979, Abstract No. 563, Volume 79-2.
    107. K.F. Lee, J.F. Gibbons, K. C. Saraswat and T.I. Kamins, "Thin Film MOSFET Fabricated in Laser-Annealed Polycrystalline Silicon," Journal Applied Physics Letters, Vol. 35, July, 1979., pp. 173~175.
    108. K. C. Saraswat, F. Mohammadi and J. D. Meindl, "WSi2 Gate MOS Devices," Technical Digest of the International Electron Device Meeting, Washington, D.C., December 1979.
    109. F. Mohammadi, J. Rouse, K. C. Saraswat and R. Helms, "Physical Properties of Steam Oxidized WSi2," IEEE Semiconductor Interface Specialist Conference, New Orleans, November 1979.

      1980
    110. F. Mohammadi, K. C. Saraswat and J. D. Meindl, "A High Voltage MOSFET in Polycrystalline Silicon," IEEE Transactions Electron Devices, Vol. ED-27, January, 1980., pp. 293--295.
    111. T. I. Kamins, K.F. Lee, J.F. Gibbons and K. C. Saraswat, "A Monolithic Integrated Circuit Fabricated in Laser-Annealed Polysilicon," IEEE Transaction Electron Devices, Vol. ED-27, January, 1980., pp. 290~293.
    112. F. Mohammadi and K. C. Saraswat, "Properties of Sputtered Tungsten Silicide for MOS Integrated Circuit Application," Journal Electrochem Society, Vol. 127, No. 2, February, 1980., pp. 450~454.
    113. K. C. Saraswat and F. Mohammadi, "Work Function of WSi2," IEEE Electron Device Letters, Vol. EDL-1, February, 1980., pp. 18~19.
    114. M. M. Mandurah, K. C. K.C. Saraswat and T.I. Kamins, "Arsenic Segregation in Polycrystalline Silicon," Applied Physics Letters, Vol. 36(8), April, 1980., pp. 683~685.
    115. F. Mohammadi, K. C. K.C. Saraswat and J. D. Meindl, "Thermal Oxidation of Sputtered thin Films of WSi2," Proceedings of the Symposium on Thin Film Interfaces and Interactions, Electrochemical Society, 1980., pp. 506~513.
    116. K. C. Saraswat and F. Mohammadi, "Formation of WSi2 of Tungsten on Silicon," Extended Abstracts of the 157th Meeting of Electrochemical Society, St. Louis, May 1980., pp. 419~421.
    117. F. Mohammadi, T.W. Sigmon and K. C. Saraswat, "Effect of Temperature and Substrate on the Steam Oxidation Mechanism of Thin WSi2 Films," Extended Abstracts of 157th Meeting of Electrochemical Society, St Loius, May 1980., pp. 422~424.
    118. T. Shibata, T.W. Sigmon, J.F. Gibbons, F. Mohammadi and K. C. Saraswat, "Oxidation Studies of WSi2 and PdSi Formed by Scanned Laser Beam Reaction," 38th IEEE Device Research Conference, Ithaca, Cornell University, June 1980.
    119. J. Rouse, F. Mohammadi, C.R. Helms and K. C. Saraswat, "Studies of Steam-Oxidized WSi2 by Auger Sputter Profiling," Applied Physics Letters, Vol. 37, 1980., pp. 305~307.
    120. M. M. Mandurah, K. C. Saraswat, C.R. Helms and T.I. Kamins, "Dopant Segregation in Polycrystalline Silicon Films," Journal of Applied Physics, Vol. 51, 1980., pp. 5755~5767.
    121. K. C. Saraswat, F. Mohammadi and J. Beaudouin, "WSi2 Gate MOS Technology," 8th International Vacuum Congress, Cannes, France, September 22~26, 1980.
    122. M. M. Mandurah, K. C. Saraswat, C.R. Helms and T.I. Kamins, "Effect of Annealing on the Electrical Properties of Polycrystalline Silicon," Extended Abstracts of 158th Meeting of Electrochemical Society, Florida, October 1980, Volume 8-2.

      1981
    123. F. Mohammadi and K. C. Saraswat, "N-Channel MOSFETs with WSi2 Gate," IEEE Electron Device Letters, Vol. EDL-2, 1981.
    124. H. Singh and K. C. Saraswat, "Thermal Oxidation of Heavily Doped Polycrystalline Silicon Thin Films," Extended Abstracts of the Spring Meeting of Electrochemical Society, Minneapolis, May 1981, Volume 81-1.
    125. K. C. Saraswat, R.S. Nowicki and J.F. Moulder, "Thermal Oxidation of Tantalum Silicide Deposited by Cosputtering," 23rd Electronics Materials Conference, Santa Barbara, CA, June 24~26 1981.
    126. M. M. Mandurah, K. C. Saraswat and T.I. Kamins, "A Model for Conduction in Polycrystalline Silicon: I. Theory," IEEE Transaction Electron Devices, Vol. ED-28, October, 1981., pp. 1163~1171.
    127. M. M. Mandurah, K. C. Saraswat and T.I. Kamins, "A Model for Conduction in Polycrystalline Silicon: II. Comparison of Theory and Experiment," IEEE Transaction Electron Devices, Vol. ED-28, October, 1981., pp. 1171~1176.
    128. C.M. Liu, M. Khambaty and K. C. Saraswat, "The Process Dependence of the Electrical Resistivity of LPCVD Polycrystalline Silicon Films," 23rd Electronics Materials Conference, Santa Barbara, June 24~26 1981.

      1982
    129. K. C. Saraswat and H. Singh, "Thermal Oxidation of Phosphorus Doped Polycrystalline Silicon," Journal Electrochemical Society, Vol. 129, October, 1982., pp. 2321~2326.
    130. K. C. Saraswat and F. Mohammadi, "Effect of Interconnection Scaling on Time Delay of VLSI Circuits," IEEE Transaction Electron Devices, Vol. ED-29, April, 1982., pp. 645~650.
    131. B. Swaminathan, K. C. Saraswat, R.W. Dutton and T.I. Kamins, "Diffusion of Arsenic in Polycrystalline Silicon," Applied Physics Letters, Vol. 40(9), May l, 1982., pp. 745~748.
    132. K. C. Saraswat, R.S. Nowicki and J.F. Moulder, "Thermal Oxidation of Tantalum Silicide in O2 and H2O," Applied Physics Letters, Vol. 41, No. 12, December, 1982., pp. 1127~1129.

      1983
    133. M. Moslehi and K. C. Saraswat, "Thermal Nitridation of Silicon in a Cold Wall Reactor," 163rd Meeting of Electrochemical Society, San Francisco, Proc. Symp. on Silicon Nitride Thin Insulating Films, vol. 83-8, pp. 324~345, May 1983.
    134. D.L. Brors, J.A. Fair, K.A. Monig and K. C. Saraswat, "Properties of Low Pressure CVD Tungsten Silicide as Related to IC Process Requirements," Solid State Technology, Vol. 26, April, 1983., pp. 183~186.
    135. M. Moslehi and K. C. Saraswat, "Electrical Characteristics of Devices Fabricated with Ultrathin Thermally-Grown Silicon Nitride and Nitroxide Gate Insulators," 1983 Symposium on VLSI Technology, Maui, Hawaii, September 1983, Abstract No. 7-4.
    136. K. C. Saraswat, D.L. Brors, J.A. Fair, K.A. Monig and R. Beyers, "Properties of Low Pressure CVD Tungsten Silicide for MOS VLSI Interconnections," IEEE Transaction Electron Dev., Vol. ED-30, November, 1983., pp. 1497~1505.
    137. H. Singh, K. C. Saraswat, J. D. Shott, J.P. McVittie and J. D. Meindl, "Scaling of SOI/PMOS Transistors," Technical Digest of IEEE International Electron Device Meeting, Washington D.C. , December 1983., pp. 67~69.
    138. K. C. Saraswat, S.Swirhun and J.P. McVittie, "Selective CVD of Tungsten for VLSI Technology," VLSI Science and Technology , Electrochemical Society, 1984., pp. 409~419.
    139. D.B. Kao, K. C. Saraswat and J.P. McVittie, "Annealing of Oxide Fixed Changes in Scaled Polysilicon Gate MOS Structures," Proceedings of the 14th Semiconductor Interface Specialists Conference, Miami Beach, December 1983.

      1984
    140. D.L. Brors, J.A. Fair, K.A. Monig and K. C. Saraswat, "Deposition Parameters and Characteristics of Low Pressure CVD Tungsten Silicide," Proceedings 9th International Conference on CVD in the 165th Meet of Electrochemical Society, Cincinnati, May 1984., pp. 275~286.
    141. S. Swirhun, K. C. Saraswat and R.M. Swanson, "Contact Resistance of LPCVD W/Al and PtSi/W/Al Metallization," IEEE Transaction Electron Device Letters, Vol. EDL-5, June, 1984., pp. 209~211.
    142. L.N. Lie, W.A. Tiller and K. C. Saraswat, "Thermal Oxidation of Silicides," Journal of Applied Physics, Vol. 56 (7), October, 1984., pp. 2127~2132.
    143. K. Shenai, E. Sangiorgi, K. C. Saraswat, R.M. Swanson and R.W. Dutton, "Accurate Barrier Modeling of Metal and Silicide Contacts," IEEE Electron Device Letters, Vol. EDL-5, May, 1984., pp. 145~147.
    144. D.L. Brors, K.A. Monig, J.A. Fair, W. Coney and K. C. Saraswat, "CVD Tungsten - A Solution for the Poor Step Coverage and High Contact Resistance of Al," Solid State Technology, Vol. 27, April, 1984., pp. 313.
    145. D. Gardner, T. Michalka, K. Saraswat, J. McVittie, T. Barbee Jr., and J. Meindl, "Al Alloys with Ti, W and Cu for Multilayer Interconnections," Proceedings 1st IEEE VLSI Multilevel Interconnection Conference, New Orleans, June 1984., pp. 68~77.
    146. D. Gardner, T. Michalka, T. Barbee Jr., K. Saraswat, J. McVittie and J. Meindl, "Aluminum Alloys with Titanium, Tungsten and Copper for Multilayer Interconnections," 42nd IEEE Device Research Conference, Santa Barbara, June 1984.
    147. H. Singh, K. C. Saraswat and J. D. Meindl, "Hydrogenation by Ion Implantation for VLSI/SOI Applications," 42nd IEEE Device Research Conference, Santa Barbara, June 1984.
    148. S. Swirhun, E. Sangiorgi, A. Weeks, M. Pinto C. Rafferty, K. Saraswat, R. Dutton and R. Swanson, "High Performance Latchup Free CMOS," Presented at the 42nd IEEE Device Research Conference, Santa Barbara, June 1984.
    149. K.A. Monig, D.L. Brors, J.A. Fair, W. Coney and K. C. Saraswat, "Properties and Deposition of Low Pressure CVD Tungsten Silicide Films," 42nd IEEE Device Research Conference , Santa Barbara, June 1984.
    150. M. Moslehi and K. C. Saraswat, "Studies of Trapping and Conduction in Ultrathin SiO2 Gate Insulators," Proceedings IEEE International Electron Device Meeting, December 1984, pp. 157~160, San Francisco.
    151. M. Moslehi and K. C. Saraswat, "Ultrathin Thermal Silicon Nitride and Nitroxide Insulators for VLSI," Proc. IEEE International Electron Device Meeting, December 1984, pp. 165~168, San Francisco.

      1985
    152. D. Gardner, T.L. Michalka, K. C. Saraswat, T.W. Barbee Jr., J.P. McVittie and J. D. Meindl, "Layered and Homogeneous Films of Al and Al/Si with Ti and W for Multilayer Interconnects," IEEE Transaction Electron Devices, Vol. ED-32, February, 1985, pp. 174~183.
    153. S. Swirhun, E. Sangiorgi, R.M. Swanson, K. C. Saraswat and R.W. Dutton, "A VLSI Suitable Schottky Barrier CMOS Process," IEEE Trans. Electron Dev., Vol. ED-32, No. 2, Feb. 1985, pp. 194~202.
    154. M. Moshlehi and K. C. Saraswat, "Thermal Nitridation of Si and SiO2 for VLSI," IEEE Trans. Electron Dev., Vol. ED-32, February, 1985, pp. 106~123.
    155. D.B. Kao, K. C. Saraswat and J.P. McVittie, "Annealing of Oxide Fixed Charges in Scaled Polysilicon Gate MOS Structures," IEEE Trans. Electron Dev., Vol. ED-32, May, 1985, pp. 918~925.
    156. H. Singh, K. C. Saraswat, J. D. Shott, J.P. McVittie and J. D. Meindl, "Hydrogenation by Ion Implantation," IEEE Electron Dev. Lett., Vol. EDL-6, No. 3, March 1985, pp. 139~141.
    157. K. Shenai, E. Sangiorgi, R.M. Swanson, K. C. Saraswat and R.W. Dutton, "Modeling and Characterization of Dopant Redistribution in Metal and Silicide Contacts," IEEE Transaction Electron Devices, 1985, ED-32, 793~799, April 1985.
    158. J. Han, M. Moslehi, C.R. Helms and K. Saraswat, "Time Dependent Compositional Variation in SiO2 films Nitrided in Ammonia," Applied Physics Letters, Vol. 46, April 1985, pp. 641~643.
    159. M. Moslehi, C.J. Han, K. C. Saraswat, C.R. Helms and S. Shatas, "Compositional Studies of Thermally Nitrided Silicon Dioxide (Nitroxide)," Journal Electrochemical Society, Vol. 132, September, 1985, pp. 2189~2197.
    160. M. Moslehi, C.Y. Fu, T.W. Sigmon and K. C. Saraswat, "Low-Temperature Direct Nitridation of Silicon in Nitrogen Plasma Generated by Microwave Discharge," Journal of Applied Physics, Vol. 58, No. 6, 15 September , 1985, pp. 2416~2419.
    161. M. Moslehi, K. C. Saraswat and S.C. Shatas, "Rapid Thermal Nitridation of SiO2 for Nitroxide Thin Dielectrics," Applied Physics Letters, Vol. 47, No. 10, 15 November, 1985, pp. 1113~1115.
    162. M. Moslehi, C.Y. Fu, K. C. Saraswat and R. Bruce, "Proc. International Symposium on VLSI," Low Temperature Direct Nitridation of Silicon in Nitrogen Plasma Generated by Microwave Discharge, May 1985, pp. 286~290, Taipei.
    163. M. Moslehi, C.Y. Fu and K. C. Saraswat, "Thermal and Microwave Nitrogen Plasma Nitridation Techniques for Ultrathin Gate Insulators of MOS VLSI," Digest of 1985 Symposium on VLSI Technology, May, 1985, pp. 14~15, Kobe, Japan.
    164. M. Moslehi, S.C. Shatas and K. C. Saraswat, "Thin SiO2 Insulators Grown by Rapid Thermal Oxidation of Silicon," Applied Physics Letters, Vol. 47, No. 12, December 15, 1985.
    165. W.M. Loh, K. C. Saraswat and R.W. Dutton, "Analysis and Scalings for Extraction of Specific Contact Resistivity," IEEE Electron Device Letters, Vol. EDL-6, March, 1985, pp. 105~108.
    166. W.M. Loh, S.E. Swirhun, E. Crabbe, K. Saraswat and R. M. Swanson, "An Accurate Method to Extract Specific Contact Resistivity Using Cross-Bridge Kelvin Resistors," IEEE Electron Device Letters, Vol. EDL-6, September, 1985, pp. 441~444.
    167. S. Swirhun, W.M. Loh, R.M. Swanson and K. C. Saraswat, "Current Crowding Effects and Determination of Specific Contact Resistivity from Contact End Resistance Measurements," IEEE Electron Device Letters, Vol. EDL-6, December, 1985, pp. 639~641.
    168. D. Gardner, T.L. Michalka, P.A. Flinn, K. C. Saraswat and J. D. Meindl, "Homogeneous and Layered Films of Al/Si with Ti for Multilevel Interconnections," Proceedings 2nd International IEEE VLSI Multilevel Interconnection Conference, Santa Clara, June 1985, pp. 102~113.
    169. M. Deal, D. Pramanik, A.N. Saxena and K. C. Saraswat, "Application of Tungsten Silicide/N+ Polysilicon Technology for VLSI," Proceedings 2nd International IEEE VLSI Multilevel Interconnection Conference, Santa Clara, June 1985, pp. 326~334.
    170. D.B. Kao, K. C. Saraswat, J.P. McVittie and W.D. Nix, "The Role of Stress in Two-Dimensional Si Oxidation," 43rd IEEE Device Research Conference, Boulder, June 1985.
    171. D.B. Kao, J.P. McVittie, W.D. Nix and K. C. Saraswat, "Two-Dimensional Silicon Oxidation Experiments and Theory," Digest of IEEE Electron Device Meeting, December, 1985, pp. 388~391, Washington, D.C.
    172. W.M. Loh, S.E. Swirhun, T.A. Schreyer, R.M. Swanson and K. C. Saraswat, "2-D Simulations for Accurate Extraction of the Specific Contact Resistivity from Contact Resistance Data," Digest of IEEE International Electron Device Meeting, December, 1985, pp. 586~589, Washington, D.C.
    173. F. Shone, K. C. Saraswat and J. D. Plummer, "Formation of 0.1 1 mm N+/P and P+/N Junctions by Doped Silicide Technology," Digest of IEEE Int. Electron Device Meeting, December, 1985, pp. 407~410, Washington, D.C.
    174. M. Moslehi, C.Y. Fu, K. C. Saraswat and R. Bruce, "Low Temperature Nitridation of Silicon in Microwave Nitrogen Plasma," The 167th Meeting of the Electrochemical Society, May, 1985, Ontario, Canada.
    175. M. Moslehi, K. C.Saraswat and S.Shatas, "Rapid Thermal Nitridation of Si and SiO2 in Ammonia," Presented in the Electronic Materials Conference, June, 1985, Colorado.
    176. C.Y. Fu, M.M. Moslehi and K. C. Saraswat, "Material Studies of Silicon Nitride Films Grown in Microwave Nitrogen Plasma," Presented in the Electronic Materials Conference, June, 1985, Colorado.

      1986
    177. M. Moslehi, S.C. Shatas and K. C. Saraswat, "Rapid Thermal Oxidation of Silicon," Fifth International Symposium on Silicon Materials Science and Technology, ECS Proc., vol. 86--4, pp. 379~397, May, 1986, Boston.
    178. M. Moslehi and K. C. Saraswat, "Rapid Thermal Nitridation of SiO2 for Nitroxide Thin Dielectrics," IEEE Silicon Interface Specialties Conference (IEEE-SISC), December, 1985, Florida.
    179. W.M. Loh, P.J. Wright, T.A. Schreyer, S.E. Swirhun. K. C. Saraswat and J.C. Meindl, "The Sidewall Resistor - A Novel Test Structure to Reliably Extract Specific Contact Resistivity," IEEE Trans. Electron Devices, Vol. EDL-7, No. 8, August, 1986, pp. 447~449.
    180. T.A. Schreyer, S. Swirhun, W. Loh, K. Saraswat and R. Swanson, "Comparison of Test Structures used for the Measurement of Low Resistive Metal-Semiconductor Contacts," IEEE VLSI Workshop on Test Structures, February, 1986, pp. 7~23, Long Beach, CA.
    181. T.A. Schreyer and K. C. Saraswat, "A Two-Dimensional Analytical Model for the Cross-Bridge Kelvin Resistor," IEEE Electron Devices, Vol. EDL-7, No. 11, December, 1986. pp. 661~663.
    182. K. C. Saraswat, W. Loh, T. Schreyer and S. Swirhun, "Measurement and Extraction of Specific Contact Resistivity," Proceedings 3rd International IEEE VLSI Multilevel Interconnection Conference, IEEE, Santa Clara, June 1986, pp. 385~395.
    183. F.C. Shone, S. E. Hansen, D. B. Kao K. C. Saraswat and J. D. Plummer, "Modeling Dopant Redistribution in SiO2/WSi2/Si Structure," Digest of IEEE Int. Electron Device Meeting, December, 1986, pp. 534~537, Washington, D.C.
    184. M. Moslehi, S. C. Shatas, and K. C. Saraswat, "Rapid thermal oxidation and nitridation of silicon," The Fifth Intl. Symp. on Silicon Materials Sci. and Technol., ECS Proc. vol. 86-4, pp.~379~397, May 1986.

      1987
    185. W.M. Loh, S. E. Swirhun, T. A. Schreyer, R. M. Swanson, and K. C. Saraswat, "Modeling and Measurement of Contact Resistance," IEEE Trans. Electron Dev., Vol. ED-34, No. 3, pp. 512~524, March 1987.
    186. D. Gardner, J. D. Meindl and K. C. Saraswat, "Interconnection and Electromigration Scaling Theory," IEEE Trans Electron Dev., Vol. ED-34, No. 3, pp. 633~643, March 1987.
    187. T.A. Schreyer, P. Wright, and K. Saraswat, "The Effect of a Superconducting Interconnect on Circuit Performance," extended abstract, 45th Annual Device Research Conference, The IEEE Electron Devices Society, June1987, p. VIB-8.
    188. M. Moslehi, P. Wright, and K. Saraswat, "Submicron IGFET Fabrication by Rapid Thermal Processing," extended abstract, 45th AnnualDevice Research Conference, The IEEE Electron Devices Society, June 1987, p.IIIB-1.
    189. K. C. Saraswat, B. Davies, M. Harrison, S. D. Leeke, W. Lukaszek, J. Mcvittie and J. Shott, "Manufacturing Technology Modeling," Proc. Workshop on Manufacturing Technology at Symp. on VLSI Technology,Karuizawa, Japan, 18 May 1987, pp. 103~125.
    190. P. Wright, W. Loh, C. C. Fu, D. Dameron, and K. C. Saraswat, "Technology and Modeling of Submicron Contacts," Digest of Technical Papers, Symp. on VLSI Technology, Karuizawa, Japan, pp.87~88, May 1987.
    191. P. Wright, W. Loh, C. C. Fu, D. Dameron, and K. C. Saraswat, "Technology and Modeling of Submicron Contacts," Proceedings 4th International IEEE VLSI Multilevel Interconnection Conference, Santa Clara, June 1987, pp. 330~336.
    192. M. Moslehi, M. Wong, K. Saraswat, and S. Shatas, "In-situ MOS Gate Engineering in a Novel Rapid Thermal/Plasma Multiprocessing Reactor," Digest of Technical Papers, Symp. on VLSI Technology, Karuizawa, Japan, pp.21~22, May 1987.
    193. M. Moslehi, S.C. Shatas, K. C. Saraswat and J. D. Meindl, "Interfacial and Breakdown Characterristics of MOS Devices with Rapidly Grown Ultrathin SiO2 Gate Insulators," IEEE Trans Electron Dev., Vol. ED-34, No. 6, pp. 1407~1410, June 1987.
    194. M. Moslehi, and K. C. Saraswat, "Selective and Nonselective LPCVD of Tungsten in a Novel Rapid Thermal/Plasma Reactor," 10th Int. Conf. on CVD, The Electrochem. Soc. Meet., Abs. No. 1053, Honolulu, October 1987.
    195. M. Wong, N. Kobayashi, R. Browning, D. Paine and K. C. Saraswat,"The Effects of Chemical Oxide on the Deposition of Tungsten by the Silicon Reduction of Tungsten Hexaflouride," 10th Int. Conf. on CVD, The Electrochem. Soc. Meet., Abs. No. 1046, Honolulu, October 1987.
    196. S. Leeke, B. Davies and K. Saraswat, "The Virtual Wafer Fab Modeling System," Symp. on Automated IC Manufacturing, The Electrochem. Soc. Meet., Abs. No. 657, Honolulu, October 1987.
    197. S. Leeke and K. Saraswat, "SHIPS: High-level Process Simulation for VLSI Manufacturing," Symp. on Automated IC Manufacturing, The Electrochem. Soc. Meet., Abs. No. 643, Honolulu, October 1987.
    198. M. Wong, N. Kobayashi, R. Browning, D. Paine and K. C. Saraswat,"The Effects of Chemical Oxide on the Deposition of Tungsten by the Silicon Reduction of Tungsten Hexaflouride," J. Electrochem. Soc., Vol. 134, No. 9, September 1987, pp 2339~2345.
    199. M. Moslehi, and K. C. Saraswat, "Formation of MOS Gates by Rapid Thermal/Microwave Remote-Plasma Multiprocessing," IEEE Electron Device Letters, Vol. EDL-8, September, 1987, pp. 421~424.
    200. P. Wright, M. Wong, and K. C. Saraswat, "The Effect of Fluorine on Gate Dielectric Properties," Digest of IEEE Int. Electron Device Meeting, December 1987, Washington, D.C., pp. 574~577.
    201. T.A. Schreyer, A. Bariya, J. P. McVittie and K. Saraswat, "Specific Contact Resistivity of RIE Etched Contacts," J. Vac. Sci. Tech., Vol. A6(3), May/June 1988, pp. 1402~1406. Also Presented at the Nov. 1987 meet of American Vac. Soc., Anehiem, CA.

      1988
    202. D. Gardner and K. C. Saraswat,"Multilayered Interconnections for VLSI," Materials Research Society Symposium, Proc. Vol 103, pp. 343~354, 1988.
    203. D.B. Kao, J.P. McVittie, W.D. Nix, and K. C. Saraswat, "Two-Dimensional Thermal Oxidation of Silicon - I. Expertiments," IEEE Trans. Elec. Dev., Vol. ED-34, May 1987,pp. 1008~1017.
    204. D.B. Kao, J.P. McVittie, W.D. Nix, and K. C. Saraswat, "Two-Dimensional Thermal Oxidation of Silicon - II. Modeling Stress Effects in Wet Oxides," IEEE Trans. Elec. Dev., ED-35, January 1988, pp. 25~37.
    205. P. Wright, W. Loh, and K. Saraswat, "Low-Resistance Submicron Contacts to Silicon," IEEE Trans. Elec. Dev., ED-35, August 1988, pp. 1328~1333.
    206. M. Wong and K. C. Saraswat, "Direct Tungsten on Silicon Dioxide formed by RF Plasma Enhanced Chemical Vapor Deposition," IEEE Electron Device Letters, Vol. EDL-9, No. 11, November 1988, pp. 582~584.
    207. T.A. Schreyer, Y. Nishi, and K. Saraswat, "A Complete RLC Transmission Line Model of Interconnect Delay," IEEE VLSI Technology Symp. Digest, San Diego, May 1988, pp. 95~96.
    208. P. Wright, M. M. Moslehi, and K. C. Saraswat, "Electrical Characteristics and Irradiation Sensitivity of IGFETs with Rapidly Grown Ultrathin Gate Dielectrics," 46th Annual Device Research Conference, The IEEE Electron Devices Society, June 1988, Boulder, Colorado.
    209. K. C. Saraswat, "Single Wafer In-situ Multiprocessing," SRC Techcon'88 Digest of Technical Papers, October 1988 Dallas.
    210. M. Wong and K. C. Saraswat, "Non-Selective RF Plasma Enhanced Chemical Vapor Deposition of Tungsten," Workshop on Tungsten and other Refractory Metals for VLSI Applications, Albuquerque, October 1988.
    211. H.C. Wulu, D. Gardner and K. C. Saraswat, "CVD W Film Stress and Calculation of Stress on p-n Junction Edge Leakage," Proc. Workshop on Tungsten and Other Refractory Metals for VLSI Applications IV, Albuquerque, October 1988, MRS, pp. 111~119.
    212. T.A. Schreyer, Y. Nishi, and K. Saraswat, "Simulation and Measurement of Picosecond Step Responses in VLSI Interconnections," Digest of IEEE International Electron Device Meeting, December, 1988, San Francisco, pp. 344~347.
    213. A. Joshi, H. S. Hu, D. Gardner and K. C. Saraswat, "Fundamental Factors Governing Improved Performance of Al-Si/Ti Multilayer Metallization for VLSI," Proceedings of 35th National Symp. of American Vacuum Society, October 1988.

      1989
    214. K. C. Saraswat, "Chinese Microelectronics," W. J. Spencer, J. Y. Chen, A. Chiang, W. Frieman, E. S. Kuh, J. L. Moll, R. F. Pease and K. C. Saraswat, FASAC Technical Assessment Report (TAR) 4060, Science Application International Corp., April 1989
    215. P. Wright and K. C. Saraswat, "The Effect of Fluorine in Silicon Dioxide Gate Dielectric," IEEE Transactions on Electron Devices, Vol. ED-36, May 1989, pp. 879~905.
    216. P. Wright, N. Kasai, S. Inoue and K. C. Saraswat, "Hot Electron Immunity of SiO2 Dielectrics with Fluorine Incorporation," IEEE Electron Devices Letters, Vol. 10, No. 3, August 1989, pp. 347~348.
    217. A. Joshi, H. S. Hu, D. Gardner and K. C. Saraswat, "Fundamental Factors Governing Improved Performance of Al-Si/Ti Multilayer Metallization for VLSI," J. Vacuum Science and Technology, Vol. A 7(3), pp. 1497~1503, May/June 1989.
    218. M. Wong and K. C. Saraswat, "Tungsten and Tungsten Shunted Polysilicon Gate Submicron CMOS Technology," Digest of Technical Papers, Symp. on VLSI Technology, Kyoto, Japan, May 1989.
    219. M. Wong and K. C. Saraswat, "SATPOLY: A Self-Aligned Tungsten on Polysilicon Process for CMOS VLSI Applications," IEEE Transactions on Electron Devices, Vol. 36, No. 7, August 1989, pp. 1355~1361
    220. P. Raje, K. C. Saraswat, and K. Cham, "A New BiCMOS/CMOS Gate Comparison Methodology and Supply Voltage Scaling Model," IEEE International Electron Device Meeting, December, 1989, Washington, D.C.
    221. L.Y. Cheng, J. P. McVittie and K. C. Saraswat, "Modeling and Measurement of CVD SiO2 Step Coverage," Proc. 2nd Int. Symp. ULSI Sci. Technol., The Electrochem. Soc., Los Angeles, Vol. 89-9, pp. 586, May 1989
    222. Y.J. Lee, C. H. Chou, B. T. Khuri-Yakub, K. C. Saraswat and M. M. Moslehi, "Temperature Measurement of Silicon Wafers Using Photo-Acoustic Techniques," Presented at the Sixteenth Review of the Progress in Quantitative NDE, Brunswick, Maine, July 31~August 5, 1989, Published in Review of Progress in Quantitative Nondestructive Evaluation (Plenum Press, New York, 1989)
    223. Y.J. Lee, C. H. Chou, B. T. Khuri-Yakub, K. C. Saraswat and M. M. Moslehi, "Photo-Acoustic Measurements of Silicon Wafers Processing Temperatures," Presented at the 1989 Ultrasonic Symp., Montreal, Canada, 3~5 October 1989.

      1990
    224. Y.J. Lee, C. H. Chou, B. T. Khuri-Yakub, and K. C. Saraswat, "Non-Invasive Process Temperature Monitoring Using Laser-Acoustic Technique," Symp. on VLSI Technology, Honolulu, June 1990.
    225. P. Raje, K. Cham, and K. C. Saraswat, "BiCMOS Gate Performance Optimization Using Unified Delay Model," Proc. Symp. on VLSI Technology, Honolulu, June 1990, pp. 91~92.
    226. L.Y. Cheng, J. C. Rey, J. P. McVittie and K. C. Saraswat, "Sticking Coefficient as a Single Parameter to Characterize Step Coverage of SiO2 Processes," Proceedings 7th International IEEE VLSI Multilevel Interconnection Conference, Santa Clara, June 1990, pp. 404~406.
    227. J.C. Rey, L.-Y. Cheng, J. P. McVittie and K. C. Saraswat, "Numerical Simulations of CVD Trench Filling Using a Surface Reaction Coefficient Model," Proceedings 7th International IEEE VLSI Multilevel Interconnection Conference, Santa Clara, June 1990, pp. 425~427.
    228. N. Kasai, P. Wright, and K. C. Saraswat, "Hot-Carrier-Degredation Characteristics for Fluorine-Incorporated nMOSFETs," IEEE Transactions on Electron Devices, Vol. 37, No. 6, June 1990, pp. 1426~1431.
    229. P. Wright, A. Kermani and K. C. Saraswat, "Nitridation and Post-Nitridation Anneals of SiO2 for Ultrathin Dielectrics," IEEE Transactions on Electron Devices, Vol. 37, No. 8, August 1990, pp. 1836~1841.
    230. P. Wright and K. C. Saraswat, "Thickness Limitations of SiO2 Gate Dielectrics for MOS ULSI," IEEE Transactions on Electron Devices, Vol. 37, No. 8, August 1990, pp. 1884~1892.
    231. J.P. McVittie, J. C. Rey, L.-Y. Cheng, A. Bariya, S. Ravi and K. C. Saraswat, "SPEEDIE: A Profile Simulator for Etching and Deposition," Extended Abstracts, SRC Techcon '90, San Jose, October 1990, pp. 16~19.
    232. A. Bariya, J. P. McVittie, C. W. Frank, K. C. Saraswat, J. C. Rey, and S. Ravi, "Modeling and Simulation of Sloped Sidewall Formation with SPEEDIE," Extended Abstracts of Fall 1990 Meeting of the Electrochemical Society, Seattle, October 1990, Abstract No. 290.
    233. C.L. Chu, K. C. Saraswat and S. S. Wong, "Characterization of Lateral Dopant Diffusion in Silicides," Extended Abstracts, SRC Techcon'90, San Jose, October 1990, pp. 455~458.
    234. S. Wood, K. C. Saraswat and J. M. Harrison "Cost Performance Modeling of Semiconductor Fabs," Extended Abstracts, SRC Techcon'90, San Jose, October 1990, pp. 309~312.
    235. S. Wood, P.P. Apte, T.J. King, M.M. Moslehi, K. C. Saraswat, "Pyrometer Modeling for Rapid Thermal Processing," Proc. SPIE Symp. on Rapid Thermal and Related Processing Techniques, October 1990, Santa Clara, Vol. 1393, pp. 337~348.
    236. Y.J. Lee, C. Chou, B. T. Khuri-Yakub, and K. C. Saraswat, "Noncontacting Acoustic Based Temperature Measurement Technique in Rapid Thermal Processing," Proc. SPIE Symp. on Rapid Thermal and Related Processing Techniques, October 1990, Santa Clara, Vol. 1393, pp. 366~371.
    237. C.J. Pass, M. D. Deal and K. C. Saraswat, "Characterization of Reactively Sputtered WNx and of a W-WN Bilayer Structure," Extended Abstracts of Fall 1990 Meeting of the Electrochemical Society, Seattle, October 1990.
    238. K.S. Uhm, G. Chin, R.W. Dutton, J.P. McVittie and K. C. Saraswat, "Modeling of Submicron Dry Etching Technology Using SUPREM-IV and SPEEDIE," 1990 3rd MicroProcess Conferences, July 16~19, 1990, Chiba, Japan.
    239. K. C. Saraswat, H. C. Wulu, J. C. Rey, M. M. Islamraja, L.-Y. Cheng and J. P. McVittie, "Simulations of LPCVD Profiles," Proc. Workshop on Tungsten and Other Advancec Metals for ULSI Applications VII, Dallas, October 1990, pp. 239~247.
    240. J.C. Rey, L.-Y. Cheng, J. P. McVittie and K. C. Saraswat, "CVD Modeling Using SPEEDIE," 37th Annual AVS Symp., Toronto, November 1990.
    241. T.J. King, J. Pfiester, J. D. Shott, J. P. McVittie and K. C. Saraswat, "A Polycrystalline-Si1-x Ge_x Gated MOS Devices," Technical Digest, IEEE International Electron Device Meeting, December, 1990, San Francisco, pp. 253~256.
    242. J.P. McVittie, J. C. Rey, M. M. Islamraja, L.-Y. Cheng, and K. C. Saraswat, "LPCVD Profile Simulations Using a Re-Emission Model," Technical Digest, IEEE International Electron Device Meeting, December, 1990, San Francisco, pp. 917~920.
    243. C.L. Chu, K. C. Saraswat and S. S. Wong, "Characterization of Lateral Dopant Diffusion in Silicides," Technical Digest, IEEE International Electron Device Meeting, December 1990, San Francisco, pp. 245~248.

      1991
    244. H.C. Wulu, K. C. Saraswat and J. P. McVittie, "Simulation of Mass Transport for Deposition in Via Holes and Trenches," J. Electrochem. Soc., Vol. 138, June, 1991, pp. 1831~1840.
    245. P. Raje, R. Ritts, K. Cham, J. Plummer, and K. C. Saraswat, "MBiCMOS:A Device and Circuit Technique Scalable to the Sub-micron, Sub-2V Regime," Digest of Technical Papers, IEEE International Solid State Circuits Conf., San Francisco, Feb. 1991, pp. 150~151.
    246. L.Y. Cheng, J. P. McVittie and K. C. Saraswat, "A New Test Structure to Identify Step Coverage Mechanisms in CVD SiO2," Applied Physics Letters, Vol. 58(19), 13 May 1991, pp. 2147~2149.
    247. J.C. Rey, L.-Y. Cheng, J. P. McVittie and K. C. Saraswat, "Monte Carlo Low Presssure Deposition Profile Simulation," J. Vacuum Science and Technology (A), Vol. 9(3), pp. 1083~1087, May/June 1991.
    248. M.M. Islamraja, J. P. McVittie, M. Cappelli and K. C. Saraswat, "A General Analytical Model for Low Pressure Deposition in 3--D Structures," 7th Int. Conf. on Numerical Analysis of Semiconductor Devices and Integreted Circuits, Copper Mountain, Colorado, April 8~12, 1991.
    249. P. Apte, M. M. Moslehi, R. Yeakley, and K. C. Saraswat, "Silicon Epitaxy Following Low Temperature Gas-Phase Removal of Native Oxide Using Anhydrous Hydrogen Fluoride," Abstracts of MRS Symp. on Rapid Thermal and Integrated Processing, abs. no. F5.9, p. 157 Materials Research Society, Anaheim, May 1991.
    250. P. Apte, M. M. Moslehi, R. Yeakley, and K. C. Saraswat, "Low Temperature In-Situ Native Oxide Removal Using Anhydrous Hydrogen Fluoride," 3rd Int. Symp. ULSI Sci. Technol., The Electrochem. Soc., Abs. No. 378, Washington D.C., May 1991.
    251. P. Apte, S. Wood, L. Booth, K. C. Saraswat, and M. M. Moslehi, "Temperature Uniformity Optimization Using Three Zone Lamp and Dynamic Control in A Rapid Thermal Multiprocessor," Abstracts of MRS Symp. on Rapid Thermal and Integrated Processing, abs. no. F4.8, p. 155 Materials Research Society, Anaheim, May 1991.
    252. Samuel C. Wood and K. C. Saraswat, "Modeling the Performance of Cluster-Based Fabs," Proc. International Semiconductor Manufacturing Science Symposium. San Francisco, May 20, 1991, pp. 8~14.
    253. Samuel C. Wood and K. C. Saraswat, "Factors Affecting the Economic Performance of Cluster-Based Fabs," Proc. Third International Symposium of ULSI Science and Technology, the Electrochem. Soc., Washington, D.C., May 9, 1991, pp. 551~565.
    254. K. C. Saraswat and T. J. King, "Polycrystalline Silicon-Germanium for CMOS and TFT Applications," Symp. on CVD issues in ULSI Interconnects and TFTs, American Vac. Soc., May 30, San Jose.
    255. T.J. King, J. Pfiester, and K. C. Saraswat, "A Variable-Workfunction Polycrystalline-Si1-x Ge-x Gate Material for Submicron CMOS Technologies," IEEE Electron Device Letters, Vol. 12, No. 10, October 1991, pp. 533~535.
    256. H. Singh, E. S. G. Shaqfeh, J.P. McVittie, and K. C. Saraswat, "Simulation of Reactive Ion Etching with Surface Re-emission," Presented at the 180th meeting of The Electrochem. Soc., Phoenix, October, 1991.
    257. T.J. King, J. Pfiester, and K. C. Saraswat, "PMOS Transistors in LPCVD Polycrystalline Silicon-Germanium Films," IEEE Electron Device Letters, Vol. 12, No. 11, November 1991, pp. 584~586.
    258. M.Mazhar Islamraja, C.Y. Chang, J.P. McVittie, M.C. Cappelli, K. C. Saraswat, "Two Precursor Model for LPCVD of Oxide from TEOS," 38th Annual Symposium and Topical Conference of the American Vacuum Society, November 11~15, 1991, Seattle, Washington.
    259. C.Y. Chang, M.M. Islamraja, J.P. McVittie, K. C. Saraswat, "PECVD Oxide Step Coverage Experiment andd Simulation," 38th Annual Symposium and Topical Conference of the American Vacuum Society, November 11~15, 1991, Seattle, Washington.
    260. C. Schaper, Y. Cho, P. Guigui, G. Hoffman, S. Norman, P. Parks, S. Boyd, G Franklin, T. Kailath, and K. C. Saraswat, "Dynamics and Control of Rapid Thermal Processing," Proc. SPIE Symp. on Rapid Thermal and Integrated Processing, September 1991.
    261. C.L. Chu, G. Chin, K. C. Saraswat, S. S. Wong and R. Dutton "Technology Limitations for N+/P+ Polycide Gate CMOS due to Lateral Dopant Diffusion in Silicides/Polysilicon Layers," IEEE Electron Device Letters, Vol. 12, No. 12, December 1991, pp. 696~698.
    262. T.J. King and K. C. Saraswat, "A Low Temperature (<550°C) Germanium-Silicon MOS Thin Film Transistor Technology for Large Area Electronics," IEEE International Electron Device Meeting, December 1991, Washington D.C.
    263. R. Ritts, P. A. Raje, J. D. Plummer, K. C. Saraswat and K. Cham, "Merged BiCMOS Logic to Extend the CMOS/BiCMOS Performance Crossover Below 2.5V Supply," IEEE J. Solid State Circuits, Vol. 26, No. 11, November 1991, pp. 1606~1614.

      1992
    264. P. Raje, K. C. Saraswat, and K. Cham, "A New Methodology for Design of BiCMOS Gates and Comparison with CMOS," IEEE Transactions on Electron Device, Vol. 39, No. 2, February 1992, pp. 339~347.
    265. P. Raje, K. C. Saraswat, and K. Cham, "Performance Driven Scaling of BiCMOS Technology," IEEE Transactions on Electron Device, Vol. 39, No. 3, March 1992, pp. 685~694.
    266. T.J. King and K. C. Saraswat, "Low-Temperature (<550°C) Fabrication of Poly-Si TFTs for Large-Area LCDs," IEEE Electron Device Letters, Vol. 13, No. 6, June 1992, pp. 309~311.
    267. P. Apte and K. C. Saraswat, "Rapid Thermal Processing Uniformity Using Multivariable Control of a Circularly Symmetric 3 Zone Lamp," IEEE Trans. Semiconductor Manufacturing, Vol. 5, No. 3, pp. 180~188, August 1992.
    268. C.Y. Chang, J.P. McVittie, and K. C. Saraswat, "Modeling of PECVD TEOS Oxide Step Coverage Using an Overhang Structure," 9th Symp. on Plasma Processing, 181st meeting of The Electrochem. Soc., St. Louis, Vol. 92-18, p.575~582, May, 1992.
    269. M.M. Islamraja, M. Cappelli J. P. McVittie, and K. C. Saraswat, "A 3-Dimensional Model for Low-Pressure Chemical-Vapor-Deposition Step in Trenches and circular Vias," J. Appl. Phys., Vol. 70(11), 1991., pp. 7137~7140.
    270. M.M. Islamraja, A. J. Bariya, J. P. McVittie, M. A. Cappelli, K. C. Saraswat, L. Moberly, and L. Lahiri "Modeling and Simulation of Plasma Enhanced Chemical Vapor Deposition of Silicon Nitride," 9th Symp. on Plasma Processing, 181st meeting of The Electrochem. Soc., St. Louis, May, 1992.
    271. M.M. Islamraja, A. J. Bariya, K. C. Saraswat, M. A. Cappelli, J. P. McVittie, L. Moberly, and L. Lahiri "Development of Design Rules for Tungsten Plugs Using Simulation," IEEE Int. Reliability Physics Symp. Monterey, 1992.
    272. C.L. Chu, K. C. Saraswat and S. S. Wong, "Measurement of Lateral Dopant Diffusion in Thin Silicide Layers," IEEE Transactions on Electron Device, Vol. 39, No. 10, October 1992, pp. 2333~2340.
    273. M. Cao, T. J. King and K. C. Saraswat, "Determination of the Densities of Gap States in Hydrogenated Polycrystalline Si and Si0.8Ge0.2 Films," Applied Physics Letters, Vol. 61(6), August 10, 1992, pp 672~674.
    274. P. Apte and K. C. Saraswat, "Rapid Thermal Multeprocessing Using Multivariable Control of a Circularly Symmetric 3 Zone Lamp," Proc. Symp. on VLSI Technology, Seattle, May 1992, pp. 52~53.
    275. K. C. Saraswat and Samuel C. Wood, "Adaptable Manufacturing Systems for Microelectronics Manufacturing: Economic and Performance Issues," Strategies for Innovation and Changes in the U.S. and Japan, An IBEAR Research Conf., Univ. of Southern Calif., May 10-12, 1992.

      1993
    276. M.M. IslamRaja, M.A. Cappelli, J.P. McVittie and K. C.Saraswat, "Profile Modeling of Diamond CVD," Extended Abstracts of Spr. Mtg. of the Electrochem. Soc., May, 1993.
    277. P. Apte, T. Kubota and K. C. Saraswat, "Constant Current Stress Breakdown in Ultrathin SiO2Films," in The Physics and Chemistry of SiO2 and the Si SiO2Interface 2," edited by C. R. Helms and B. E. Deal, Plenum, 1993, pp. 447~454.
    278. Levent Degertekin, J. Pei, Y. J. Lee, B. T. Khuri-Yakub and K. C. Saraswat, "In-Situ Temperature Monitoring in RTP by Acoustical Techniques," MRS Spring Meeting, San Francicco, MRS Vol. 303 - Rapid Thermal and Integrated Processing, July 1993.
    279. Y. Eguchi, M.M. Islamraja, J.P. McVittie and K. C. Saraswat, "Step Coverage Modeling of Physical Vapor Deposition of Ti and WSix," Proceedings 10th Int'l VLSI Multilevel Interconnect Conf. (VMIC), p. 517~519, 1993.
    280. Y. Eguchi, M.M. Islamraja, J.P. McVittie and K. C. Saraswat, "Profile Modeling of Physical Vapor Deposition of Ti and WSix," Proceedings 3rd Int'l Symp. Proc. Phys. and Modeling in Semicon. Technol., the Electrochem. Soc., Abs. No. 715, vol. 93-2 , 1993.
    281. M. Cao, , A. W. Wang and K. C. Saraswat, "Low Pressure Chemical Vapor Deposition of Si1-x Gex Films," Spring 1993 Electro Chemical Soc. Mtg., Proc. of the 3rd International Symp. on Process Physics and Modeling in Semiconductor Technology, Vol.93-6, p.350, May 1993, Honolulu.
    282. P. Apte, T. Kubota and K. C. Saraswat, "Constant Current Stress Breakdown in Ultrathin SiO2Films," J. Electrochemical Society, Vol. 140, No. 3, March, 1993, pp. 770~773.
    283. C.Y. Chang, J. P. McVittie, K. C. Saraswat, "Backscattering Deposition in Ar Sputtering of Oxide," Appl. Phys. Lett., vol. 63(16), pp. 2294~2296, 1993.
    284. M.M. Islamraja, C. Chang, J. P. McVittie, M. A. Cappelli, and K. C. Saraswat, "Two Precursor Model for LPCVD of Silicon Dioxide from TEOS," J. Vac. Sci. and Tech. B, p. 720~726, June, 1993.
    285. K. C. Saraswat. "Programmable Factory for IC Manufacturing for the 21st Century," Proc. IEEE/SEMI Int. Semiconductor Manufacturing Science Symp., San Francisco, July 19 , 1993, pp. 2~6.
    286. S. Wood and K. C. Saraswat, "Configuration and Management Strategies for Cluster-Based Fabs," Proc. IEEE/SEMI Int. Semiconductor Manufacturing Science Symp., San Francisco, July 19 , 1993, pp. 63~68.
    287. S. Wood and K. C. Saraswat, "Performance Evaluation of Adaptable Manufacturing Systems for Semiconductor IC Production," 1993 Symposium on VLSI Technology, Kyoto, Japan, Abstract on pp. 133~134, May 19, 1993.
    288. K. C. Saraswat, S. C. Wood, J. D. Plummer and P. Losleben, "Programmable Factory for Adaptable IC Manufacturing," Symp. VLSI Technology, Kyoto, Japan, May 1993.
    289. Y.J. Lee, F. L. Degertekin, J. Pei, B.T. Khuri-Yakub And K. C. Saraswat, "In-Situ Acoustic Thermometry Tomography Rapid Thermal Processing Semiconductor Wafers," Digest of 1993 IEEE International Electron Device Meeting, December 1993, Washington D.C., pp. 187~190.
    290. Pushkar P. Apte and K. C. Saraswat, "SiO2degradation with charge injection polarity," IEEE Electron Device Lett., Vol. 14, No. 11, Nov. 1993.
    291. S. Wood and K. C. Saraswat, "Adaptable Manufacturing Systems," Int. Symp. on Semiconductor Manufacturing, Austin, September 20~21, 1993.
    292. L. Degertekin, J. Pei, Y.J. Lee, B.T. Khuri-Yakub and K. C. Saraswat, "In-Situ Temperature Monitoring In RTP By Acoustical Techniques," MRS Spring Meeting, San Francicco, April 1993.
    293. Y.H. Chen, C. Schaper and K. C. Saraswat,"Computer Aided Design of Rapid Thermal Processors," MRS Spring Meeting, Symposium on Rapid Thermal and Integrated Processing San Francisco, April 12~15, 1993.
    294. P. Apte, H. Park, C. R. Helms and K. C. Saraswat, "Thermally Driven In-situ Removal of Native Oxide Using Anhydrous HF," In Interface Control of Electrical, Chemical, and Mechanical Properties, Mat. Res. Proc., Vol. 318, pp. 281~286, 1993.
    295. M. Cao, T. Zhao, K. C. Saraswat, and J. D. Plummer, "Hydrogenation of polycrystalline TFTs by ion implantation," Proceeding of Active Matrix Liquid Crystal Displays Symposium, p.2, Oct. 1993, Bethlehem.
    296. T. Zhao, M. Cao, J. D. Plummer, and K. C. Saraswat. "A novel vertical submicron polysilicon TFT," Proceeding of Active Matrix Liquid Crystal Displays Symposium, p.14, Oct. 1993, Bethlehem.
    297. T. Zhao, Min Cao, J. D. Plummer, and K. C. Saraswat, "A novel floating gate spacer polysilicon TFT," Digest of 1993 IEEE International Electron Device Meeting, December 1993, Washington D.C., pp. 393-396.
    298. S. Jurichich, T.-J. King, K. C. Saraswat and J. Mehlhaff, "A Low-Thermal-Budget Polycrystalline Silicon-Germanium Thin-Film Transistor Technology for Large-Area Electronics," International Semiconductor Device Research Symposium, 1993 December 1, Charlottesville, VA.
    299. C. Schaper, M. Moslehi, K. Saraswat, and T. Kailath, "Real-Time Multi-Zone Temperature Control of Rapid Thermal Processing Semiconductor Device Manufacturing Equipment," In Proc. of American Control Conference, San Francisco, CA 1993.
    300. Levent Degertekin, J. Pei, Y. J. Lee, B. T. Khuri-Yakub and K. C. Saraswat, "In-Situ Acoustic Thermometry of Semiconductor Wafers," 1993 IEEE Sonics and Ultrasonics Symposium, Baltimore, Maryland Oct. 31~ Nov. 3, 1993.

      1994
    301. L. Degertekin, J. Pei, B.T. Khuri-Yakub And K. C. Saraswat, "In-Situ Acoustic Temperature Tomography of Semiconductor Wafers," Applied Physics Letters, Vol. 64(11), 14 March 1994, pp. 1338~1340.
    302. Pushkar P. Apte and K. C. Saraswat, "Modeling Ultrathin Dielectric Breakdown on Correlation of Charge Trap-generation and Charge-to-breakdown," 1994 Proc. IEEE Int. Reliability Phys. Symp., San Jose, April 1994, pp 136~42.
    303. K. C. Saraswat, B. T. Khuri-Yakub, P. P. Apte, L. Booth, Y. H. Chen, P. Dankoski, L. Degertekin, G. Franklin, M. M. Moslehi, C. Schaper, P. Gyugyi, Y. J. Lee, and J. Pei, S. C. Wood, "Rapid Thermal Multiprocessing for Adaptable Manufacturing of ICs," IEEE Trans. Semiconductor Manufacturing, Vol. 7, No. 2, May 1994, pp. 159~175.
    304. C. Schaper, M. M. Moslehi, K. C. Saraswat and T. Kailath, "Control of MMST RTP: Reproducability, Uniformity, and Integration Flexible Manufacturing," IEEE Trans. Semiconductor Manufacturing, Vol. 7, No. 2, May 1994, pp. 202~219.
    305. T.J. King, J. P. McVittie, K. C. Saraswat, and J. R. Pfiester, "Electrical Properties of Heavily Doped Polycrystalline Silicon-Germanium Films," IEEE Transactions on Electron Devices, Vol. 41, No. 2, Feb. 1994, pp. 228~232.
    306. Min Cao, T. Zhao, K. C. Saraswat, and J. D. Plummer, "A Simple EEPROM Cell Using Polysilicon Thin Film Transistors," IEEE Electron Device Lett., Vol. 15, No. 8, August 1994, pp. 304~306.
    307. T.J. King and K. C. Saraswat, "Deposition and Properties of Low-Pressure Chemical-Vapor Deposited Polycrystalline Silicon-Germanium Films," J. Electrochem. Soc., Vol. 141, No. 8, August 1994, pp. 2235~2240.
    308. S. Talwar, M. Cao, K.-J. Kramer, K. C. Saraswat, and T.W. Sigmon, "High-performance thin-film transistors fabricated by XeCl excimer laser annealing without post-hydrogenation," in 52nd IEEE Device Research Conf., Boulder, Colorado, June 1994.
    309. N. Bhat and K. C. Saraswat, "Interface -state Generation in Deposited Oxides due to Bias Temperature Stress," Extended abstracts, Spring 1994 Meeting of the. Electrochem Society, Abs No. 119, p. 179 San Francisco, May 1994.
    310. D. S. Bang, J. P. McVittie, M. M. IslamRaja, K. C. Saraswat, Z. Kirvokapic, S. Ramaswami, and R. Cheung, "Profile Modeling of Collimated Ti Physical Vapor Deposition," in Proceedings of 10th Symp. on Plasma Processing, 185th Meeting of the Electrochem Society in San Francisco, ECS Proc. Vol. 94-20, 557~567, 1994.
    311. S. Jurichich, T.-J. King, K. C. Saraswat and J. Mehlhaff, "Low-Thermal-Budget Polycrystalline Silicon-Germanium Thin-Film Transistors Fabricated by Rapid Thermal Annealing," Japan Journal of Applied Physics, Vol. 33, No. 8B, Part 2, 1994.
    312. T.J. King and K. C. Saraswat, "Fabrication and Characterization of Polycrystalline Silicon-Germanium Thin-Film Transistors," IEEE Transactions on Electron Devices, Vol. 41, No. 9, pp. 1581~1591, September 1994.
    313. Pushkar P. Apte and K. C. Saraswat, "Correlation of trap-generation and charge-to-breakdown Qbd A Physical-damage Model of Dielectric Breakdown," IEEE Trans. Electron Devices, Vol. 41, No. 9, pp. 1595~1602, September 1994.
    314. Min Cao, T. Zhao, K. C. Saraswat, and J. D. Plummer, "A Vertical Submicron Polysilicon Thin Film Transistors Using a Low Temperature Process," IEEE Electron Device Lett., Vol. 15, No. 10, October 1994, pp. 415~417.
    315. M. Cao, S. C. Kuehne, K. C. Saraswat, and S. S. Wong, "A Low Thermal Budget Polycrystalline Silicon Thin Film Transistor Using Chemical Mechanical Polishing," SID/IEEE Int. Display Research Conf. Monterey, CA, Oct., 1994.
    316. C. Schaper, M. M. Moslehi, K. C. Saraswat and T. Kailath, "Modeling, Identification, and Control of Rapid Thermal Processing," J. Electrochem. Soc., Vol. 141, No. 11, November 1994, pp. 3200~3209.
    317. Levent Degertekin, P. E. Roche, B. V. Honin, J. Pei, B. T. Khuri-Yakub and K. C. Saraswat, "Ultrasonic Temperature Measurement in RTP," 2nd Int. Rapid Thermal Processing Conf., August 1994, Monterey, CA.
    318. J. Li, J. P. McVittie, J. Ferziger, K. C. Saraswat, M. Schmidt and D Dobkin, "Profile Simulation Studies of Oxide Deposition from Ozone/TEOS," 10th Symp. on Plasma Processing in 185th Meeting of the Electrochem Society, San Francisco, May 1994.
    319. P. Dankoski, L. Booth, G. Franklin, and K. C. Saraswat, "RTP Temperature Sensing - Just How Hot Is It?," 33rd Conf. on Decision and Control, 1994.
    320. D. S. Bang, J.P. McVittie, M.M. IslamRaja, K. C. Saraswat, Z. Krivokapic, and R. Cheung, "Modeling of Ti Physical Vapor Deposition Systems," Intnl. Mtg Numerical Modeling of Process and Device for Integrated Ckts: NUPAD-V, pp. 41~44, Honolulu, June, 1994.
    321. D. S. Bang, J.P. McVittie, M.M. IslamRaja, K. C. Saraswat, Z. Krivokapic, S. Ramaswami and R. Cheung, "Dynamic Modeling of Collimator Clogging in Physical Vapor Deposition Systems," Proceedings VLSI Multilevel Interconnect Conference (VMIC), p. 554, June, 1994.
    322. K. Hsiau, D.S. Bang, J.P. McVittie, R. Dutton, K. C. Saraswat, S. Tripathi, A.J. Bariya and D.B. Kao, "Simulation of Tungsten Etchback for Via and Contact Plugs," Proceedings VLSI Multilevel Interconnect Conference (VMIC), pp. 545~547, June, 1994.
    323. D. S. Bang, K. Hsiau, J.P. McVittie, K. C. Saraswat, Z. Krivokapic, M. Vicente, S, Gupta, R. Alvis, "Simulation of a Tungsten Filled Via Process Module for Process Integration," paper MS-Mo A7, Am. Vac. Soc. 41st Nat. Symp, Denver, Oct. 1994, and submitted to J. Vac. Sci. and Technol.
    324. D. S. Bang, K. C. Saraswat, Z. Krivokapic, J.P. McVittie, "A Multipule Target Sputter System with Enhanced Wafer Uniformity, Lifetime Uniformity, and Wafer Scaleability," IEDM Tech. Digest, p. 549~552, 1994.
    325. J. Li, J.P. McVittie, K. C. Saraswat, and S.E. Lassig, "Modeling Studies of Mechanisms in Biased ECR CVD," Proceedings VLSI Multilevel Interconnect Conference (VMIC), pp. 524~526, June, 1994.
    326. J. Li, J.P. McVittie, J. Ferziger and K. C. Saraswat, "Use of Simulation to Optimize Multistep Intermetal Dielectric Deposition from PECVD and Ozone/TEOS APCVD Processes," Proceedings VLSI Multilevel Interconnect Conference (VMIC), pp. 539~541, June, 1994.
    327. J. Li, J.P. McVittie, J. Ferziger, K. C. Saraswat, J. Dong, "Optimization of a Intermetal Dielectric Deposition Module Using Simulation," paper MS-Mo A9, Am. Vac. Soc. 41st Nat. Symp, Denver, Oct. 1994.
    328. Y. Chen, L. Booth, C. Schaper, B. T. Khuri-Yakub and K. C. Saraswat, "3D Modeling of Rapid Thermal Processors for Design Optimization of a New Flexible RTP System," IEEE Int. Electron Dev. Meet., San Francisco, December 1994, pp. 545~548.
    329. N. Bhat and K. Saraswat, "Degradation of LPCVD oxides," Abstracts of Int. Display Research Conf., Oct. 10~13, 1994, Monterey, CA., p. 310

      1995
    330. D. S. Bang, J.P. McVittie, K. C. Saraswat, J.A. Iacponi, J. Gray, Z. Krivokapic, and K. Littau, "Simulation Studies of TiN PVD and CVD Thin Films forin-Film Processi Contact/Via Liners, in Modeling and Simulation of Thng," ed. D.J. Srolovitz. Materials Research Society Symposium Proceedings Vol. 389 (April 1995), p. 173~179.
    331. J. Li, J.P. McVittie, J. Ferziger, K. C. Saraswat, J. Dong, "Optimization of a Intermetal Dielectric Deposition Module Using Simulation," J. Vac. Sci. & Technol., B 13(4), pp. 1867~74 (1995).
    332. D. S. Bang, J.P. McVittie, K. C. Saraswat, Z. Krivokapic, J.A. Iacoponi, and J. Gray, "Three Dimensional PVD Virtual Reactor for VLSI Metalization," IEDM Tech. Digest, p.97~100 Dec. 1995.
    333. D. S. Bang, Z. Krivokapic, M. Hohmeyer, J.P. McVittie and K. C. Saraswat, "Three Dimensional Simulation for Sputter Deposition Equipment and Processes" in Simulation of Semiconductor Devices and Processes, Electrochemical. Soc.Vol. 6, pp. 166~169 (1995).
    334. P. Smeys, P. B. Griffin, and K. C. Saraswat, "An improved calibration methodology for modeling advanced isolation structures," Simulation of semiconductor devices and processes, H. Ryssel and P. Pichler (Eds.), 6, p. 42 (1995).
    335. P. Smeys, P. B. Griffin, and K. C. Saraswat, "Material properties of LPCVD silicon nitride for modeling and calibrating the simulation of advanced isolation structures," J. Appl. Phys., 78, p. 2837 (1995).
    336. P. Smeys, P B. Griffin, and K. C. Saraswat, "Geometry dependence of polysilicon void formation in deep submicron PBL isolation technologies: evidence of the stress relaxation model," Proc. 5th International ULSI Science and Technology Symp., (The Electrochemical Society, Reno), p. 94 (1995).
    337. W. Abdel-Ati, S. Ma, T.-C. Yang, J.P. McVittie, and K. C. Saraswat, "Comparison of Automated Capacitor Testing Methods for Plasma Charging Induced Damage," Proc. Electrochem. Soc. Symp. on ULSI Sci. and Technol., Vol. 95-5, May. 1995, pp. 410~417.
    338. M. Cao, , A. W. Wang and K. C. Saraswat, "Low Pressure Chemical Vapor Deposition of Si1-x Gex Films on SiO2 Characterization and Modeling," J. Electrochem. Soc., vol. 142, No. 5, May 1995, pp. 1566~1572.
    339. D. S. Bang, .M. Cao, , A. W. Wang and K. C. Saraswat, and T-J. King, "Resistivity study of boron and phosphorous doped polycrystalline Si1-x Gex films," Applied Physics Letters, 66 (2), 9 January 1995, pp. 195~197.
    340. Min Cao, T. Zhao, K. C. Saraswat, and J. D. Plummer, "Study on Hydrogenation of Polysilicon Thin Film Transistors by Ion Implantation," IEEE Trans. Electron Devices., Vol. 42, No. 6, June 1995, pp. 1134~1140.
    341. L. Degertekin, P. Dankoski, B. T. Khuri-Yakub and K. C. Saraswat, "In-situ Ultrasonic wafer Temperature Sensor for RTP," 3rd Int. Rapid Thermal Processing Conf., August 1995, Amsterdam.
    342. K. C. Saraswat, "Rapid Thermal Multiprocessing for a Programmable Factory for Manufacturing of ICs," Proc. Nato ASI on Advances in Rapid Thermal and Integrated Processing, Edited by F. Rozeboom July 3~14, 1995, Maratea, Italy.
    343. P. Dankoski, F. L. Degertekin, B. T. Khuri-Yakub, G. Franklin and K. C. Saraswat, "Toward RTP Control Using Ultrasonic Sensor," 3rd Int. Rapid Thermal Processing Conf., August 1995, Amsterdam.
    344. C. McLaughlin, S. Jurichich, S. Wood, K. Saraswat, "Effects of Plant Scale on AM-LCD Amortization Costs," Digest of Technical Papers 1995 Display Manufacturing Technology Conference, p.10, 1995.
    345. H. Park, P. Smeys, Z. H. Sahul, K. C. Saraswat, R. W. Dutton, and H. Hwang, "Quasi-Three-Dimensional Modeling of Sub-Micron LOCOS Structures," IEEE Trans. Semicond. Manufacturing, VOL. 8, NO. 4, November 1995.
    346. S. Ma, J. P. McVittie, and K. C. Saraswat, "Effects of Wafer Temperature on Plasma Charging Induced Damage to MOS Gate Oxides," IEEE Electron Device Lett., Vol. 16, No. 12, December 1995, pp. 534~536.
    347. N. Bhat, M. Cao and K. Saraswat, "Bias temperature instability in hydrogenated polysilicon thin film transistors," Society for information display international symposium digest of technical papers vol. 26, p. 393 (1995).

      1996
    348. P. Kapur, D.S. Bang, J.P. McVittie and K. C. Saraswat, "Simulation of Aluminum Surface Profile in Trenches and Contacts/Vias For Ionized Physical Vapor Deposition," Proceedings of VLSI Multilevel Interconnect Conference, Santa Clara, pp. 201~206, June 1996.
    349. K. C. Saraswat, "Rapid Thermal Multiprocessing for a Programmable Factory For Manufacturing of ICs," in Advances in Rapid Thermal and Integrated Processing (F. Roozeboom), Kluwer Academic Publishers, Dordrecht, The Netherlands, 1996, pp. 375~414.
    350. Y.J. Lee, B. T. Khuri-Yakub and K. C. Saraswat, "Temperature Measurement in Rapid Thermal Processing Using the Acoustic Temperaturre Sensor," IEEE Trans. Semicond. Manufacturing, vol. 9, No. 1, pp. 115~121, February 1996.
    351. S. Jurichich, S. C. Wood and K. C. Saraswat, "Manufacturing Cost of Active-Matrix Liquid-Crystal Displays as a Function of Plant Capacity" IEEE Trans. on Semiconductor Manufacturing, vol. 9, No. 4, November 1996, pp. 562~572.
    352. N. Bhat, P. Apte and K. C. Saraswat, "Charge Trap Generation in LPCVD Oxide Under High Field Stressing," IEEE Trans. Electron Devices., Vol. 43, No. 4, April 1996, pp 554~560.
    353. M. Cao, S. Talwar, K. J. Kramer, T. W. Sigmon, and K. C. Saraswat, "A High-Performance Polysilicon Thin-Film Transistor Using XeCl Excimer Laser Crystallization of Pre-Patterned Amorphous Si Films," IEEE Trans. Electron Devices., vol. 43, No. 4, April 1996, pp. 561~567.
    354. N. Bhat, A. Wang and K. Saraswat, "Effect of annealing ambient on performance and reliability of LPCVD oxides for TFTs," MRS Symp. on Flat Panel Display Materials II, May 1996, San Francisco, vol. 424, pp. 287~292.
    355. N. Bhat, A. Wang and K. C. Saraswat, "Rapid Thermal Anneal of Gate Oxide for low Thermal Budget TFTs," SID 1996 spring meeting, May 1996, San Diego.
    356. A. Wang, Navakanta Bhat and K. Saraswat, "TMCTS for gate dielectric in thin film transistors," MRS Symp. on Flat Panel Display Materials II, May 1996, San Francisco, vol. 424, pp. 281~286.
    357. T.C. Yang and K. C. Saraswat, "A Study of Growth Conditions on Ultrathin MOS Gate Oxide Reliability," MRS 1996 spring meeting, May 1996, San Francisco.
    358. V. Subramanian, K. Saraswat, H. Hovagimian and J. Mehlhaff. "Optimization and Modeling of Silicon-Germainium Thin Film Transistors for AMLCD Applications using a Plackett-Burman Experimental Design," IEEE Statistical Metrology Workshop, Hawaii, June 9, 1996.
    359. V. Subramanian, F.L. Degertekin, P. P. Dankoski, B.T. Khuri-Yakub and K. C. Saraswat, "A Novel Technique for In-Situ Monitoring of Crystallinity and Temperature During Rapid Thermal Annealing of Thin Si/Si-Ge Films on Quartz/Glass," MRS Symp. on Flat Panel Display Materials II, May 1996, SanFrancisco, vol. 424, pp. 267~272.
    360. V. Subramanian, N. Bhat and K. C. Saraswat, "Accelerated Breakdown in Thin Oxide Films due to Interfacial Stress and Carrier Depletion," MRS 1996 spring meeting, May 1996, San Francisco.
    361. S. Tomita, S. S. Jurichich, and K. C. Saraswat, "Transistor Sizing for AMLCD Integrated TFT Drive Circuits," SID 16th Int. Didplay Res. Conf., Birmingham, U.K., Oct. 1~3, 1996.
    362. P. Smeys, P. B. Griffin, and K. C. Saraswat, "Influence of post-oxidation cooling rate on residual stress and pn-junction leakage current in LOCOS isolation structures," IEEE Trans. Electr. Dev., vol. 43, pp. 1989~1993, Nov. 1996.
    363. P. Smeys, P. B. Griffin, Z. Rek, I. Wolf and K. C. Saraswat, "The Influence of Oxidation Induced Stress on the Generation Current and its Impact on Scaled Device Performance," IEEE Int. Electron Dev. Meet., San Francisco, December 1996, pp. 709~712.

      1997
    364. S. Jurichich, S. C. Wood, and K. C. Saraswat, "Cost Modeling of Low Temperature Large-Area Polysilicon TFT LCD Manufacturing," SPIE Symp. on Electronic Imaging Science and Technology, Feb. 1997.
    365. V. Subramanian, F. L. Degertekin, P. Dankoski, B. T. Khuri-Yakub and K. C. Saraswat, "In-Situ Monitoring of Crystallinity and Temperature During Rapid Thermal Crystallization of Si on Glass/ Quartz Using an Acoustic Sensor," J. Electrochem. Soc. vol. 144, no. 6, june 1997, pp. 2216~2221.
    366. V. Subramanian, P. Dankoski, F. L. Degertekin, B. T. Khuri-Yakub and K. C. Saraswat, "Controlled 2-step Solid-Phase Crystallization for High Performance TFTs," IEEE Electron Device Lett., vol. 18, no. 8, August 1997, pp. 378~381.
    367. T. C. Hsiao, Albert W. Wang, Krishna Saraswat, and Jason C.S. Woo, "An alternative gate electrode material of fully depleted SOI CMOS for low power applications," 1997 IEEE International SOI Conference Proceedings, pp. 20-1 (1997) Presented at the 1997 IEEE International SOI Conference (Fish Camp, California, USA) on October 6, 1997.
    368. L.C. Bassman, B.P. Shieh, D.-K. Kim, R.P. Vinci, J.P. Mcvittie,K. C. Saraswat, and M.D. Deal, "Simulation of the effect of dielectric air gaps on interconnect reliability," MRS spring meeting, April 1997, San Francisco.
    369. V. Subramanian and K. C. Saraswat, "Laterally Crystallized Polysilicon TFTs Using Patterned Light Absorption Masks," Device Research Conf., Boulder, Abs. No. III.A.3, June. 1997.
    370. V. Subramanian and K. C. Saraswat, "A Novel Technique for 3-D Integration: Ge-seeded Laterally Crystallized TFTs," Symp. VLSI Technology, Kyoto, Japan, June 1997.
    371. T. C. Yang, N. Bhat and, K. C. Saraswat "Effect Of Interface Stress on Reliability of Gate Oxide," Proc. Symp. Silicon Nitride and Silicon Oxide Thin Insulating Films, the Electrochem. Soc., Ed. J. Deen, M. Brown, K. Sundaram, S. Raider, Vol. PV 97-10, pp. 34~45, 1997.
    372. D. Connelly and K. C. Saraswat, "Compound GeSi Structures: Novel Measurement Algorithm via Optical Reflectance Sptryectromet," 39th TMS Electronic Materials Conference, Paper No. H10, June 1997, Colorado.
    373. N. Bhat, M. Cao and K. C. Saraswat, "Bias temperature instability in hydrogenated thin film transistors," IEEE Trans. Electr. Dev., vol. 44, July 1997, pp. 1102~1108.
    374. S. Ma, J. P. Mcvittie K. C. Saraswat, "Prediction of Plasma Charging Induced Gate Oxide Damage by Plasma Charging Probe," IEEE Electron Dev. Lett., vol. 18, October 1997, pp. 468~470.

      1998
    375. B. Shieh, K. C. Saraswat, J.P. McVittie, S. List, S. Nag, M. Islamraja, R.H. Havemann, "Air-Gap Formation During ILD Deposition to Lower Interconnect Capacitance," IEEE Electron Device Lett., vol. 19, no. 1, January 1998, pp. 16~18.
    376. B. Shieh, L. C. Bassman, D.-K. Kim, K. C. Saraswat, M. Deal, J.P. McVittie, R. S. List, S. Nag, and L. Ting, "Air-Gap Formation During ILD Deposition to Lower Interconnect Capacitance," Proc. IEEE Int. Interconnect Tech. Conf., June 1998, San Francisco, pp. 16~18.
    377. L.C. Bassman, N.R. Ibrahim, P.M. Pinsky, K. C. Saraswat, and M.D. Deal, "Mesoscale Modeling of Diffusion in Polycrystalline Structures," Proc. IEEE Int. Conf. On Simulation of Semiconductor Process and Devices, Sept. 1997, pp. 149~152.
    378. V. Subramanian and, K. C. Saraswat "Optimization of Silicon-Germanium TFTs Through the Control of Amorphous Precursor Characteristics," IEEE Trans. Electron Dev., vol. 45, pp. 1690~1695, August 1998.
    379. V. Subramanian and K. C. Saraswat, "High Performance Germanium-Seeded Laterally Crystallized TFTs for Vertical Device Integration," IEEE Trans. Electron Dev., vol. 45, no. 9, September 1998, pp. 1934~1939.
    380. A. W. Wang and K. C. Saraswat, "Silicon interlayer heterojunction effects in polycrystalline Si1-xGex thin film transistors," 56th Annual Device Research Conference, Presented at the 56th Annual Device Research Conference, Charlottesville, Virginia, pp. 106~7, June 24, 1998.
    381. A. W. Wang and K. C. Saraswat, "Evidence for heterojunction effects in polycrystalline Si1-xGex thin film transistors with Si caps," Presented at the 1998 Spring Meeting of the Materials Research Society, San Francisco, California, April 14, 1998. Published in Materials Research Society Symposium Proceedings 577 (Epitaxy and Applications of Si-Based Heterostructures)
    382. A. W. Wang and K. C. Saraswat, "Passivation of poly-Si thin film transistors with ion-implanted deuterium," Presented at the 1998 Spring Meeting of the Materials Research Society, San Francisco, California, April 14, 1998. Published in MRS Symp. Proceedings 508 (Flat-Panel-Display Materials and Large-Area Processes)
    383. N. Bhat and K. C. Saraswat, "Characterization of border trap generation in rapid thermally annealed oxides deposited using silane chemistry," Journal of Applied Physics, vol. 84, no. 5 , p. 2722, Sept. 1998.
    384. P. Kapur, D. Bang, J.P. McVittie, K.C. Saraswat, T. Mountsier, "Method for angular sputter yield extraction for high-density plasma chemical vapor deposition simulators," Journal of Vacuum Science & Technology B (Microelectronics and Nanometer Structures) AIP for American Vacuum Soc, May-June 1998. vol.16, no.3, p. 1123~8.
    385. Albert W. Wang and Krishna C. Saraswat, "Modeling of grain size variation effects in polycrystalline thin film transistors," Technical Digest of the IEEE International Electron Device Meeting, San Francisco., December 1998., pp. 277~280.

      1999
    386. N. Bhat, A. Wang and K.C.Saraswat, "Rapid thermal anneal of gate oxides for low thermal budget TFTs," IEEE Trans. Electron Dev., vol. 46, pp. 63~69, Jan. 1999.
    387. P. Smeys, P. B. Griffin, Z. U. Rek, I. DeWolf and K. C. Saraswat, "Influence of Process-Induced Stress on Device Characteristics and its Impact on Scaled Device Performance," IEEE Trans. Electron Dev., vol. 46, pp.1245~1252, June 1999.
    388. T. C. Yang, P. Sachdev and K. C. Saraswat, "Dependence of fermi level positions at gate and substrate on the reliability of ultrathin MOS gate oxides," IEEE Trans. Electron Dev. vol. 46, No. 7. pp. 1457~1463., July 1999.
    389. V. Subramanian, M. Toita, N. R. Ibrahim, S. J. Souri and K. C. Saraswat, "Low-leakage Germanium-seeded Laterally-crystallized Single-grain 100nm TFTs for Vertical Integration Applications," IEEE Electron Dev. Lett., Vol. 20, No. 7, July, 1999, pp. 341~343.
    390. S.-H. Lee, P. Sachdev, T.-C. Yang, J. C. Bravman, and K. C. Saraswat, "Effect of interface stress on the quasi-breakdown of ultrathin oxide," Abs. in Proc 196th Meeting of the Electrochem. Soc., Honolulu, October 1999.
    391. S. Abdollahi-Alibeik, J. P. McVittie, K.C. Saraswat, V. Sukharev, P. Schoenborn, "Analytical modeling of silicon etch process in high density plasma," Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films - September 1999 - Volume 17, Issue 5, pp. 2485~2491.
    392. B.P. Shieh, K. Saraswat, M. Deal, and J. McVittie, "Air Gaps Lower K of Interconnect Dielectrics," Solid State Technology, February 1999, p. 51~8.
    393. B.P. Shieh, J. McVittie, M. Deal, K. C. Saraswat and S. Nag, "Flux Characterization and Topography Simulation of HDP-CVD of Silicon Dioxide," 1st Int. Conf. on Adv. Materials and Processes for Microelectronics, American Vac. Soc. Abs # S2-MoP8, March 1999, San Jose.
    394. P. Kapur, J. McVittie, M. Deal, K. C. Saraswat R. Bubber, G. Shang and S. Gopinath, "Surface Morphology of Metallo-Organic CVD of Copper Films for Seed Layer in Integrated Interconnects," 1st Int. Conf. on Adv. Materials and Processes for Microelectronics, American Vac. Soc. Abs # S1-WeM4, March 1999, San Jose.
    395. M. Y. Liao, K. Wong, J. P. McVittie, and K. C. Saraswat , "Abatement of perfluorocarbons with an inductively coupled plasma reactor," Journal of Vacuum Science & Technology B: Vacuum, Surfaces, and Films ,Nov. 1999. vol.17, no.6, p. 2638~43.
    396. A. R. Joshi and K. C. Saraswat, "Sub-micron Thin Film Transistors with Metal Induced Lateral Crystallization," 196th Meeting of the Electrochem. Soc., Honolulu, Hawaii, abstract no. 1358, 1999.
    397. S. J. Souri and K. C. Saraswat, "Interconnect Performance Modeling for 3-D IC’s With Multiple Si Layers," Proc. IEEE Int. Interconnect Tech. Conf., pp. 24~26, June 1999, San Francisco.

      2000
    398. T. C. Yang and, K. C. Saraswat "Effect of Physical Stress on the Degradation of Thin SiO2 Films Under Electrical Stress," IEEE Trans. Electron Dev. vol. 47, No. 4, pp. 746~755, April 2000.
    399. M. Toita, P. Kalavade and K. C. Saraswat, "Control of Amorphous Si Crystallization Using Ge Deposited by LPCVD" Proc. MRS Symp. Vol. 609 No. A9.5, 2000.
    400. A. W. Wang and K. C. Saraswat, "A strategy for modeling of variations due to grain size in polycrystalline thin film transistors," IEEE Trans. Electron Dev. vol. 47, pp. 1035~1043, May 2000.
    401. K. Banerjee, A. Mehrotra, W.R. Hunter, K. C. Saraswa, K.E. Goodson and S. S. Wong, "Quantitative Projections of Reliability and Performance for Low-k/CuInterconnect Systems," Proc. IEEE Int. Reliability Phys. Symp., San Jose, pp. 283~288, April 2000.
    402. S. J. Souri, K. Banerjee, A. Mehrotra and K. C. Saraswat, "Multiple Si Layer ICs: Motivation, Performance Analysis, and Design Implications," 37th ACM Design Automation Conference (DAC), June 5~9, Los Angeles, CA, 2000, pp. 213~220.
    403. P. Kalavade and K. C. Saraswat, "A Novel sub-10nm transistor", Abstracts of the IEEE Device Research Conference, June 2000, pp. 71~72.
    404. S. Abdollahi-Alibeik, J. P. McVittie, K.C. Saraswat, V. Sukharev, P. Schoenborn, "Analytical modeling of silicon etch process in high density plasma," Journal of Vacuum cience & Technology A: Vacuum, Surfaces, and Films - September 1999 - Volume 17, Issue 5, pp. 485~2491.
    405. M. Joshi, J. P. McVittie, K. Saraswat, C. Cismaru and J. L. Shohet, "Measurement of VUV Induced Surface Conduction in Dielectrics Using Synchrotron Radiation," 5th Internat. Symp.on Plasma Process Induced Damage Conf., Santa Clara, CA, May 2000, pp. 14~17.
    406. M. Joshi, J. P. McVittie and K. Saraswat, "Direct Experimental Determination and Modeling of VUV Induced Bulk Conduction in Dielectrics during Plasma Processing," 5th Internat. Symp.on Plasma Process Induced Damage Conf., Santa Clara, CA, May 2000, pp. 157~160.
    407. J. P. McVittie, M. Joshi, K. C. Saraswat, "Effects of VUV on Plasma Charging," Dry Process Symposium Proceedings, Tokyo, Japan, pp. 25~30 , Nov. 2000.
    408. Ting-Yen Chiang, K. Banerjee, and K. C. Saraswat, "Effect of Via Separation and Low-k Materials on the Thermal Characteristics of Cu Interconnects," IEEE Int. Electron Dev. Meet., San Francisco, December 2000, pp. 261~264.
    409. Q. Xiang, J. Jeon, P. Sachdev, B. Yu, K. C. Saraswat and M. Lin, "Very High Performance 40nm CMOS with Ultra-thin Nitride/Oxynitride Stack Gate Dielectric and Pre-doped Dual Poly-Si Gate Electrode," IEEE Int. Electron Dev. Meet., San Francisco, December 2000, pp. 860~861.

      2001
    410. S. Abdollahi-Alibeik, J. Zheng, C.T. Gabriel, J. P. McVittie, K.C. Saraswat. S. Abraham, "Modeling and Simulation of Feature-Size-Dependent Etching of Metal Stacks," JVST B, Jan/Feb, 2001.
    411. J. A. Davis, R. Venkatesan, A. Kaloyeros, M. Beylansky, S. J. Souri, K. Banerjee, K. C. Saraswat, A. Rahman, R. Reif, and J. D. Meindl, "Interconnect Limits on Gigascale Integration (GSI) in the 21st Century," Proc. IEEE, VOL. 89, No. 3, March 2001.
    412. C. M. Perkins, B. B. Triplett, and P. C. McIntyre, K. Saraswat S. Haukka and M. Tuominen, "Electrical and Material Properties of ZrO2 Gate Dielectrics by Atomic Layer Chemical Vapor Deposition," Applied Physics Letters.
    413. C. M. Perkins, B. B. Triplett, P. C. McIntyre and K. Saraswat, "Si/ZrO2/Si Gate Stack Systems," MRS Symp. on Gate Stack and Silicide Issues in Si Processing, abs. no. K1.5, San Francisco, April 2001.
    414. H. Kim, P. C. McIntyre and K. Saraswat, "Phase Diagram Simulations in Amorphous metal Silicate Systems," MRS Symp. on Gate Stack and Silicide Issues in Si Processing, abs. no. K2.11, San Francisco, April 2001.
    415. K. Banerjee, S. J. Souri, and K. C. Saraswat, "3-D ICs: A Novel Chip Design for Improving Deep Submicron Interconnect Performance and Systems-on-Chip Integration," Proc. IEEE, May 2001.
    416. T.-Y. Chiang, K. Banerjee, and K. C. Saraswat, "A New Analytical Thermal Model for Multilevel ULSI Interconnects Incorporating Via Effect," Proc. IEEE Int. Interconnect Tech. Conf., June 2001, San Francisco, pp. 92~94.
    417. P. Kapur, J. P. McVittie and K. C. Saraswat. "Realistic Copper Interconnect Performance with Technological Constraints,Interconnect Performance Modeling for 3-D ICs With Multiple Si Layers," Proc. IEEE Int. Interconnect Tech. Conf., June 2001, San Francisco, pp. 233-235.
    418. T.-Y. Chiang and K. C. Saraswat, "Impact of Vias on the Thermal Characteristics of Deep Sub-Micron Cu/low-k Interconnects," VLSI Tech. Symp. Kyoto, Japan, June 2001.
    419. P. Kalavade and K. C. Saraswat, "Lateral Gate All-Around (GAA) poly-Si Transistors," Abstracts of the IEEE SOI Conference, September 2001.
    420. V. Sukharev, B. P. Shieh, R. Choudhury, C. Park and K. C. Saraswat, "Reliability studies on Multilevel Interconnection with Intermetal Dielectric Airgaps," Microelectronics Reliability, 41, 2001, pp. 1631-1635.
    421. T.-Y. Chiang, S. J. Souri, Chi On Chui, and K. C. Saraswat, "Thermal Analysis of Heterogeneous 3-D ICs with Various Integration Scenarios," IEEE Int. Electron Dev. Meet., Washington, DC, December 2001, pp. 681-684.
    422. T.-Y. Chiang, K. Banerjee, P. and K. C. Saraswat, "Compact Modeling and SPICE-Based Simulation for Electrothermal Analysis of Multilevel ULSI Interconnects," Computer Aided Design, 2001. ICCAD 2001. IEEE/ACM International Conference on , 2001 pp. 165 -172.

      2002
    423. P. Kapur, J. P. McVittie and K. C. Saraswat. "Technology and Reliability Constrained Future Copper Interconnects -- Part I: Resistance Modeling," IEEE Trans. Electron Dev., Vol. 49, No. 4, April 2002, pp. 590-597.
    424. P. Kapur, G. Chandra, J. P. McVittie and K. C. Saraswat. "Technology and Reliability Constrained Future Copper Interconnects -- Part II: Performance Implications," IEEE Trans. Electron Dev., Vol. 49, No. 4, April 2002, pp. 598-604.
    425. H.-S. Kim, P.C. McIntyre, K.C. Saraswat, "Electrical and Materials Properties of ALD-Grown ZrO2 and HfO2 Gate Dielectrics," MRS 2002 spring meeting, April 2002, San Francisco.
    426. T.-Y. Chiang, K. Banerjee, and K. C. Saraswat, "Analytical Thermal Model for Multilevel VLSI Interconnects Incorporating Via Effect," IEEE Electron Device Letters, Vol. 23, No. 1, pp. 31-33, January 2002.
    427. P. Kapur and K. C. Saraswat "Comparisons Between Electrical and Optical Interconnects for On-Chip Signaling," Proc. IEEE Int. Interconnect Tech. Conf., June 2002, San Francisco, pp. 89-91.
    428. P. Kapur and K. C. Saraswat "Power Dissipation in Optical Clock Distribution Network for High Performance ICs," Proc. IEEE Int. Interconnect Tech. Conf., June 2002, San Francisco, pp. 151-153.
    429. G. Chandra, P. Kapur and K. C. Saraswat "A Methodology for the Interconnect Performance Evaluation of 2D and 3D Processors with Memory," Proc. IEEE Int. Interconnect Tech. Conf., June 2002, San Francisco, pp. 164-166.
    430. G. Chandra, P. Kapur and K. C. Saraswat "Scaling Trends for the On Chip Power Dissipation," Proc. IEEE Int. Interconnect Tech. Conf., June 2002, San Francisco, pp. 170-172
    431. B. P. Shieh, M.D. Deal, K.C. Saraswat, R. Choudhury, C-W. Park, V. Sukharev, W. Loh and P. Wright, "Electromigration Reliability of Low Capacitance Air-Gap Interconnect Structures," Proc. IEEE Int. Interconnect Tech. Conf., June 2002, San Francisco, pp. 203-205.
    432. T-Y Chiang, B. Shieh and K. Saraswat, "Impact of Joule Heating on Scaling of Deep Sub-Micron Cu/Low-K Interconnects," Digest of 2002 Symposium on VLSI Technology, Honolulu, Hawaii, June 2002, pp. 141-142.
    433. P. Kalavade, J. M. Hergenrother, T. W. Sorsch, S. Aravamudhan, M. K. Bude, E. J. Ferry, F. P. Klemens, A. Kornblit, W. M. Mansfield, J. F. Miner, D. Monroe, G. D. Wilk, P. M. Voyles, J. L. Grazul, K. C. Saraswat, "The Ultrathin-Body Vertical Replacement-Gate MOSFET: A Highly-Scalable, Fully-Depleted MOSFET with a Deposition-Defined Ultrathin (< 15 nm) Silicon Body," 2002 IEEE Si Nanoelectronics Workshop June 9-10, 2002, Honolulu, Hawaii
    434. Chi On Chui, S. Ramanathan, B. B. Triplett, P. C. McIntyre, and K. C. Saraswat, "Ultrathin High-k Gate Dielectric Technology for Germanium MOS Applications," IEEE Device Research Conf., Santa Barbara, June 2002.
    435. P. Kapur, G. Chandra and K. C. Saraswat, "Power Estimation in Global Interconnects and its Reduction using a Novel Repeater Optimization Methodology," Proc. of 39th Design Automation Conference (DAC), pp. 461-465, June 2002.
    436. Chi On Chui, S. Ramanathan, B. B. Triplett, P. C. McIntyre, and K. C. Saraswat, "Germanium MOS Capacitors Incorporating Ultrathin High-k Gate Dielectric," IEEE Electron Dev. Lett., Vol. EDL-23, pp. 473-475, August 2002.
    437. Yaocheng Liu, Michael D. Deal, Krishna C. Saraswat, and James D. Plummer, "Single-crystalline Si on insulator in confined structures fabricated by two-step metal-induced crystallization of amorphous Si," Appl. Phys. Lett., Vol. 81, No. 24, 9 December 2002.
    438. Chi On Chui, H. S. Kim, David Chi. B. B. Triplett, P. C. McIntyre, and K. C. Saraswat, "A Sub-400'C Germanium MOSFET Technology with High-k Dielectric and Metal Gate," IEEE Int. Electron Dev. Meet., San Francisco, December 2002.

      2003
    439. H. Kim, P.C.McIntyre and K. C. Saraswat, "Effects Of Crystallization on the Electrical Properties of Ultrathin HfO2 Dielectrics Grown by Atomic Layer Deposition," Appl. Phy. Lett. Vol. 82, No. 1, 6 January 2003, pp. 106-108.
    440. A. R. Joshi, T. Krishnamohan and K. C. Saraswat, "A Model for Crystal Growth During Metal Induced Lateral Crystallization of Amorphous Silicon," J. Appl. Phys. Vol. 93 , No. 1, January 2003, pp. 175-181.
    441. A. R. Joshi and K. C. Saraswat, "Metal Induced Dopant Activation and Low Temperature Fabrication of High Performance TFTs," IEEE Trans. Electron Dev., (Accepted).
    442. M.Y. Liao, J.P. McVittie, M.D. Deal, K. C. Saraswat and B. Schueler, "Mass Transfer for Cross-Contamination with ZrO2 Plasma Etching," AVS 4th International Conference on Microelectronics and Interfaces (ICMI), March 6, 2003, Santa Clara, CA.
    443. H. Kim, P.C.McIntyre and K. C. Saraswat, "Atomic layer deposition of ZrO2 on W for metal-insulator-metal capacitor application," Appl Phys. Lett., Vol. 82, No. 17, 28 April 2003, pp. 2874-2876.
    444. Ali K. Okyay, Chi On Chui, and Krishna C. Saraswat, "Asymmetric Group IV MSM Photodetectors with Reduced Dark Currents," CLEO June 2003.
    445. H. Kim, P. C. McIntyre, and K. C. Saraswat, "Materials and Electrical Properties of ZrO2, HfO2 and Nano-laminate Gate Dielectrics Grown by ALD," MRS Fall Meeting, Boston (2002).
    446. H. Kim, P. C. McIntyre, and K. C. Saraswat, "The Structural and Electrical Properties of Ultra-Thin HfO2 and Nanolaminates Synthesized by Atomic Layer Deposition," IEEE Semiconductor Interface Specialists Conference (SISC), SanDiego (2002).
    447. A. R. Joshi and K. C. Saraswat, "Nickel induced crystallization of a-Si gate electrode at 500C and MOS capacitor reliability," IEEE Trans. Electron Dev., Volume 50, No. 4 , April 2003, pp. 1058 -1062
    448. R. S. Shenoy and K. C. Saraswat, 'Optimization of Extrinsic Source/Drain Resistance in Ultrathin body Double-Gate FETs', 2003 Silicon Nanoelectronics Workshop, Kyoto, June 2003.
    449. D. Wang, Q. Wang, A. Javey, R. Tu, H. Dai, H. Kim, P. C. McIntyre, T. K.mohan and K. C. Saraswat, "Germanium nanowire field-effect transistors with SiO2 and high- kHfO2gate dielectrics, Appl Phys. Lett., Vol. 83, No. 12, 22 September 2003, pp. 2432-2434.
    450. T. K.mohan, Z. Krivokapic, K. C. Saraswat, "A novel sub-20nm Depletion-Mode Double-Gate (DMDG) FET," IEEE SISPAD, Sept. 2003
    451. Chi On Chui, K. GopalaK.n, P. B.Griffin, J. D.Plummer and K. C. Saraswat, "Activation and Diffusion Studies of Ion-implanted p and n Dopants in Germanium" Appl Phys. Lett., Vol. 83, No. 16, 20 October 2003, pp 3275 - 3277.
    452. D. Chi, B. B. Triplett, P. C. McIntyre, C. O. Chui, K. C. Saraswat, E. Garfunkel, and T. Gustafsson, "High-k Metal Oxides Dielectrics on Ge (100) Substrates," MRS 2003 Spring Meeting, Symposium on Advanced Gate Stack Materials, Paper D3.17, San Francisco, CA, April 21-25, 2003.
    453. D. Chi, C. O. Chui, S. Ramanathan, B. B. Triplett, K. C. Saraswat, and P. C. McIntyre, "UV-Ozone Oxidized High-k Dielectrics on Si and Ge Substrates," The 45th TMS Electronic Materials Conference (EMC) Digest, Paper S5, Salt Lake City, UT, June 25-27, 2003.
    454. H. Kim, P. C. McIntyre, C. O. Chui, and K. C. Saraswat, "Atomic Layer Deposition of ZrO2 on Si and Ge Substrate," MRS 2003 Spring Meeting, Symposium on High-k Dielectrics, Paper D2.11, San Francisco, CA, April 21-25, 2003.
    455. Chi On Chui, Ali K. Okyay, and K. C. Saraswat, "Effective Dark Current Suppresion with Asymmetric MSM Photodetectors in Group IV Semiconductors," IEEE PhotonicsTech. Lett., Vol. 15, Nov. 2003, pp. 1585-1587.
    456. H. Kim, P. C. McIntyre, and K. C. Saraswat, "Crystallization of HfO2 Synthesized by Atomic Layer Deposition: Electrical and Microstructural Behavior," ECS Fall Meeting, Orlando (2003).
    457. T. Krishnamohan, C. Jungemann and K. C. Saraswat, "A novel, very high performance, sub-20nm Depletion-Mode Double-Gate (DMDG) Si/SixGe(1-x)/Si channel PMOSFET", IEEE Int. Electron Dev. Meet., Washington, D.C., Dec. 2003.
    458. C. O. Chui, H. Kim, P. C. McIntyre, and K. C. Saraswat, "A Germanium NMOSFET Process Integrating Metal Gate and Improved Hi-k Dielectrics," IEEE International Electron Devices Meeting (IEDM) 2003 Technical Digest, pp. 437-440, Washington, DC, December 7-10, 2003.

      2004
    459. B. Rajendran, P. Kapur, K. C. Saraswat, R. F. W. Pease, "Self-consistent Power/Performance/Reliability Analysis for Copper Interconnects" presented in SLIP 2004, Paris.
    460. Rohit S. Shenoy and Krishna C. Saraswat, "Optimization of Extrinsic Source/Drain Resistance in Ultrathin body Double-Gate FETs", IEEE Trans. Nanotechnology, Vol. 2, Dec. 2003, pp. 265-270.
    461. H. Kim, P.C. McIntyre, and K. C. Saraswat, "Microstructural evolution of ZrO2-HfO2 nanolaminate structures grown by atomic layer deposition," Accepted to J. Mat. Res. (2003).
    462. H. Kim, A. Marshall, P.C. McIntyre, and K. C. Saraswat, "Crystallization kinetics and microstructure-dependent leakage current behavior of ultra-thin HfO2 dielectrics: in-situ annealing studies," Submitted to Appl. Phys. Lett. (2003).
    463. C. O. Chui, D.-I. Lee, A. A. Singh, D. Chi, P. C. McIntyre, P. A. Pianetta, and K. C. Saraswat, "Synchrotron Radiation Photoemission Spectroscopy of High-k Gate Stack in High-performance Ge MOS Devices," MRS 2004 Spring Meeting, Symposium on Joint Session: High-k and High Mobility Substrates, Paper B5.2/D5.2, San Francisco, CA, April 12-16, 2004.
    464. H. Kim, P.C. McIntyre, and K. C. Saraswat, "Microstructural evolution of ZrO2-HfO2 nanolaminate structures grown by atomic layer deposition," J. Mat. Res. Vol. 19, No. 2, Feb 2004.
    465. H. Kim, P. C. McIntyre, S. Stemmer, C. O. Chui, and K. C. Saraswat, "High-k Interface Engineering: the Interaction of Reactive Metal Electrodes with ALD-ZrO2/SiO2 and HfO2/SiO2 Gate Stacks," MRS 2004 Spring Meeting, Symposium on Metal Gates, Paper D4.4, San Francisco, CA, April 12-16, 2004.
    466. C. O. Chui, H. Kim, P. C. McIntyre, and K. C. Saraswat, "Ge MOS Dielectric Stack with ALD High-k Metal Oxide and Oxynitride Interlayer," MRS 2004 Spring Meeting, Symposium on High-Mobility Group-IV Materials and Devices, Paper B8.7, San Francisco, CA, April 12-16, 2004.
    467. Kang-ill Seo, P. C. McIntyre and K. Saraswat, "High-k (ZrO2, HfO2) Dielectrics on Si Substrates Synthesized by Elevated Temperature UV-Ozone Oxidation Technique," MRS 2004 Spring Meeting, Symposium on High-Mobility Group-IV Materials and Devices, Paper D3.14, San Francisco, CA, April 12-16, 2004.
    468. H. Kim, P. C. McIntyre, S. Stemmer, C. O. Chui and K. C. Saraswat, "High-k Interface Engineering: the Interaction of Reactive Metal Electrodes with ALD-ZrO2/SiO2 and HfO2/SiO2 Gate Stacks," MRS 2004 Spring Meeting, Symposium on High-Mobility Group-IV Materials and Devices, Paper D4.4, San Francisco, CA, April 12-16, 2004.
    469. Paul McIntyre, H. Kim, D. Chi, C. O. Chui, B. Triplett, A. Javey, H. Dai and Krishna Saraswat, "Novel Deposition Processes for High-k/Ge Devices: Interface Engineering," MRS 2004 Spring Meeting, Symposium on High-Mobility Group-IV Materials and Devices, Paper D5.1/B5.1, San Francisco, CA, April 12-16, 2004.
    470. D. Chi, C. O. Chui, S. Ramanathan, B. Triplett, K. C. Saraswat and P. C. McIntyre, "Metal Oxide/Semiconductor Interfaces in UV-Ozone Oxidized High-k Dielectric Stacks on Si and Ge (001) Substrates," MRS 2004 Spring Meeting, Symposium on High-Mobility Group-IV Materials and Devices, Paper D5.6/B5.6, San Francisco, CA, April 12-16, 2004.
    471. C. O. Chui, H. Kim, P. C. McIntyre and K. C. Saraswat, "Atomic Layer Deposition of High-k Dielectric for Germanium MOS Applications - Substrate Surface Preparation," IEEE Electron Dev. Lett., Vol. EDL-25, pp. 274-276, May 2004.
    472. H. Cho, P. Kapur, and K. C. Saraswat, "Power Comparison between High-speed Electrical and Optical Interconnects for Inter-chip Communication", Proc. IEEE Int. Interconnect Tech. Conf., June 2004, San Francisco.
    473. M. S. Bakir, C. O. Chui, A. K. Okyay, K, C. Saraswat and J. D. Meindl, "Integration of Optical Polymer Pillars Chip I/O Interconnections with Si MSM Photodetectors," IEEE Trans. Electron Dev. VOL. 51, NO. 7, JULY 2004, pp. 1084-1090.
    474. H. Kim, P.C. McIntyre, C.O. Chui, K.C. Saraswat, and S. Stemmer, "Engineering Chemically Abrupt High-k/Silicon Interfaces Using Oxygen-Gettering Metal Overlayers," presented at WODIM 2004, Kinsale,Ireland, June 29, 2004. (Best paper award)
    475. D. Chi, C. O. Chui, K. C. Saraswat B. Triplett, and P. C. McIntyre, "Zirconia grown by ultraviolet ozone oxidation on germanium (100) Substrates", J. Appl Phys., Vol. 96, No 1, pp. 813 - 819, 1 July 2004
    476. H. Cho, P. Kapur, and K. C. Saraswat, "Power Comparison between High-speed Electrical and Optical Interconnects for Inter-chip Communication", IEEE J. Lightweight Tech. Vol. 22, pp. 2021-2033, Sept. 2004.
    477. C. O. Chui, F. Ito and K. C. Saraswat, "Scalability and Electrical Properties of Germanium Oxynitride MOS Dielectrics," IEEE Electron Dev. Lett., Vol. EDL-25, pp. 613-615, Sept. 2004.
    478. H. Kim, P. C. McIntyre, C. O. Chui, K. C. Saraswat and M. H. Cho, "Interfacial characteristics of HfO2 grown on n